Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: TechieGuy-alt who wrote (7411)	9/3/2000 12:04:40 AM
From: Bilow	Respond to of 275872

Hi TechieGuy-Alt; Re design for a 32-bit adder involving only two levels of NAND gates... What I was referring to was doing the computation in a single stage of sum of products. This means that no ripple is involved. What you do is basically compute all the possible products that result in a particular bit being high, and or them together. Here, I'll get us started with the first few (i.e. lowest significant) terms, in VHDL: -- A,B: STD_LOGIC_VECTOR(31 downto 0); -- Inputs -- SUM: STD_LOGIC_VECTOR(31 downto 0); -- Output SUM(0) <= (A(0) and (not B(0))) -- xxx1 + xxx0 or (B(0) and (not A(0))); -- xxx0 + xxx1 SUM(1) <= (A(1) and (not B(1)) and (not A(0))) -- xx10+xx0x or (B(1) and (not A(1)) and (not A(0))) -- xx00+xx1x or (A(1) and (not B(1)) and (not B(0))) -- xx1x+xx00 or (B(1) and (not A(1)) and (not B(0))) -- xx0x+xx10 or (A(1) and B(1) and A(0) and B(0)) -- xx11+xx11 or ((not A(1)) and (not B(1)) and A(0) and B(0)); -- xx01+xx01 The rest of the terms are similar, but the expansion starts to take up a lot of terms, particularly by the time you've reached the 32nd bit (G), but as you can see, there is no absolute requirement for ripple carries. Anybody want to compute out the sum of products description for bit 2? Maybe there is a reduction available. I don't have time to think about it. -- Carl