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To: Tenchusatsu who wrote (52639)	9/5/2000 7:10:29 PM
From: Scumbria	Respond to of 93625

Ten, In the post below, Scumbria is the one is hinting at such signal integrity issues with DDR. He also says you're the one implying that DDR's future lies in soldered-down parts. Whoa! I know nothing about board signal integrity issues. I was interpreting Carl as having hinted at that. If Carl says it isn't so, than I will have to retract my interpretation. Scumbria

To: Tenchusatsu who wrote (52639)	9/6/2000 12:12:07 AM
From: Bilow	Read Replies (1) \| Respond to of 93625

Hi Tenchusatsu; Re DDR and signal integrity issues... Sorry for misinterpreting your post as suggesting that you didn't think DDR in the desktop was going to work. There is some confusion here between "signal integrity" issues, and "efficiency" issues. First, it is pretty clear, even Samsung publicly states, that 266MHz DDR DIMMs are going to work just fine. But I still say that the eventual future of DDR lies in point to point, soldered down chips. The same applies to RDRAM and SDRAM, for that matter. Those DDR DIMMs give better bandwidth at 266MHz than RDRAM does at PC800 speeds, but Nvidia is already shipping piles of 333MHz DDR, and samples are floating around of 400MHz DDR graphics cards. Link: The card ran at 200 MHz chip clock and 400 MHz memory clock by default, but we could do continuous testing at [472MHz.] www6.tomshardware.com The difference? The graphics cards are implemented with point to point connections, just like the RDRAM on the PS2. The point to point connection, with no user serviceable memory, means a 50% improvement in bandwidth performance. With the current speed processors, a 50% improvement in bandwidth (rather than latency) isn't that big of a deal, user serviceablility is worth more, but with faster processors, and SMP cards coming out, that 50% will eventually, *in the future,* be too big to ignore. When it does become important, you will see memory soldered down on the motherboard, just like you saw cache memory ripped from the hands of users, and soldered down. I agree that DDR signalling issues, are not trivial. In fact, I'd be willing to state that 95% of the people reading this post would be unable to design a DDR memory system that had a hope in hades of running at 266MHz. The same can be said about any other variety of high speed bussed logic. The only way trivial way to avoid paper cuts is to stay far, far away from the edges of the envelope. -- Carl