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To: Bilow who wrote (52854)	9/8/2000 1:56:49 PM
From: charred water	Read Replies (1) \| Respond to of 93625

Carl, what does this link say? Perhaps this link will explain things better: watch.impress.co.jp -- Carl

To: Bilow who wrote (52854)	9/8/2000 2:57:35 PM
From: John Walliker	Read Replies (1) \| Respond to of 93625

Carl, In actual fact, DDR uses considerably less power than SDRAM, You have previously stated that DDR chips use exactly the same die as SDRAM devices but with different metalisation to reconfigure the bus drivers, so why would a chip configured for SDRAM operation use considerably more power? You have said that in a notebook application high memory bandwidths are seldom used, so it can't be the bus interface voltage as this would only make a difference at high bandwidths, and also that parallel termination is not needed in notebook applications, so it can't be the termination power. (You originally claimed that for desktops as well, but that seems to have changed, at least according to Micron.) John

To: Bilow who wrote (52854)	9/8/2000 3:04:24 PM
From: John Walliker	Respond to of 93625

Carl, In actual fact, DDR uses considerably less power than SDRAM, You have previously stated that DDR chips use exactly the same die as SDRAM devices but with different metalisation to reconfigure the bus drivers, so why would a chip configured for SDRAM operation use considerably more power? You have said that in a notebook application high memory bandwidths are seldom used, so it can't be the bus interface voltage as this would only make a difference at high bandwidths in a series terminated bus, and also that parallel termination is not needed in notebook applications, so it can't be the termination power. (Micron obviously don't believe that their customers are as skilled in memory system design as you, so they recommend parallel termination even for the SO DIMMs intended for notebook PCs.) John