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To: pgerassi who wrote (111603)9/27/2000 5:27:14 PM
From: Road Walker  Respond to of 186894
 
Pete,

Did anyone ever call you "The Bulldog". I've never seen anyone that was more relentless in pursuing a point that makes no difference anyway.

John



To: pgerassi who wrote (111603)9/27/2000 5:49:41 PM
From: Tenchusatsu  Read Replies (4) | Respond to of 186894
 
Pete, <Have you tried the x86-64 emulator yet? Perhaps that is the route you could use to estimate performance.>

Intel had an IA-64 emulator for a long time, yet the general comments coming from AMDroids in the past was that emulators always overestimate real-world performance. It's ironic that you are now referring Paul to an emulator to estimate x86-64 performance.

Funny thing is, Itanium will be released next month along with official benchmarks (I think). Think Sledgehammer will have even taped-out by then?

Tenchusatsu



To: pgerassi who wrote (111603)9/28/2000 1:19:43 AM
From: Paul Engel  Read Replies (1) | Respond to of 186894
 
Petered Principle - Re: "Have you tried the x86-64 emulator yet? Perhaps that is the route you could use to estimate performance."

Why should I? You're the jerk who said he knew the SudgeThumper performance - so WHY DIDN'T YOU USE IT?

Re: " AMD does make it available for public consumption. Why didn't Intel do the same for Itanium?."

This shows what a COMPLETE IGNORAMUS YOU ARE.

Intel had ITanium emulators running 2 1/2 years ago - and all major OEMs had been using them up until real silicon was available about 10 months ago.

The more you shoot your big mouth off, the more we realize how really ignorant you are and how little you actually know.

Paul



To: pgerassi who wrote (111603)9/28/2000 1:21:30 AM
From: Paul Engel  Respond to of 186894
 
Peter Principle - Re: "Besides, the Itanium has to compete with several competing 64 bit RISC chips. The Alpha even has x86 emulation using something similar in design to trace cache but implemented far differently. If it came out 3 years ago at the published speeds it could have a chance, now it is severely less desirable."

Severely less desirable?

What does that make the SLUDGEHUMPER - which won't be out for over a year?

I guess it makes the Sludgehumper IRRELEVANT.

Paul



To: pgerassi who wrote (111603)9/28/2000 1:27:04 AM
From: Paul Engel  Respond to of 186894
 
Petey - Why don't you help AMD design the SludgeHumper?

Thet are so far along !!!

Yeah right !!!

They're still hiring folks to DESIGN THE DAMN CHIP !!!

amd.com

Here's a list of career opportunities we are offering on the Sledgehammer team. These are opportunities that you simply won't want to miss out on. So find out how your unique skill set matches up with AMD. You can also email these descriptions to a friend.

Circuit Design Tool Architect
MTS CAD Design Engineer
Verification Environment Developer
Sr. CAD Design Engineer
Verification Completeness/Coverage Lead
Directed Verification Developer
Macro Logic Verification. Developer
Design Debug/Verification Engineer
MTS Logic Design Engineer
Sr. MTS Logic Design Engineer
Performance Model Developer, Architect
RTL Developer
Performance Model Lead, Architect

Circuit Design Tool Architect
A technology related B.S. degree or equivalent combination of training, and 10+ years of related experience. A M.S/Phd degree in EE/CE/CS with 7+ years of related experience is preferred. Requires demonstrated technical expertise in architecting CAD tools and methodology for complex state-of-the-art VLSI designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Extensive experience with circuit design tools, static/dynamic timing verification tools and an in-depth understanding of high speed circuit design techniques is a requirement. Direct experience with Pathmill, HSPICE, Moscape, XAT, Chrysalis a plus. Requires good communication skills. Provides leadership and guidance to junior engineers in the team. Provides technical expertise and strategic direction for architecting CAD tool and methodology for complex custom circuit designs. Determines algorithms and evaluates feasibility of different vendor tool usage in the design of CAD methodology for a new product. Develops the circuit CAD methodology development plan for next generation designs. Recommends capital equipment needed for production use. Performs project definition, global methodology plans, evaluation and integration of point vendor tools, training and documentation, and acceptance testing. Develops quality, timely and cost effective solutions, very independently. Interfaces with CAD vendors and CMD/TMD designers and CAD to ensure design integration. Develops an effective working relationship with parties involved. Maintains and enhances existing CAD tools and methodology. Improves existing algorithms. Acts as a project leader on specific projects. Work on related projects and/or assignments as needed, to meet team goals. Req# IC01682

MTS CAD Design Engineer
A technology related B.S. degree or equivalent combination of training, and 6+ years of related experience. A M.S/Phd degree in EE/CE/CS with 4+ years of related experience is preferred. Requires demonstrated technical expertise in CAD tools and methodology development for complex state-of-the-art VLSI designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Experience with logic simulation, formal verification, static timing tools and Verilog is a requirement. Direct experience with VCS, Verilog-NC, Speedsim, Chrysalis, PrimeTime a plus. Requires good communication skills. Provides leadership and guidance to junior engineers in the team. Provides technical expertise and strategic direction for CAD tool and methodology development for front end tools in areas of simulation, formal verification, static timing analysis. Determines algorithms and evaluates feasibility of different vendor tool usage in the design of CAD methodology for a new product. Supplies input towards CAD methodology development plan. Recommends capital equipment needed for production use. Performs project definition, global methodology plans, evaluation and integration of point vendor tools, training and documentation, and acceptance testing. Develops quality, timely and cost effective solutions, very independently. Interfaces with CAD vendors and CMD/TMD designers and CAD to ensure design integration. Develops an effective working relationship with parties involved. Maintains and enhances existing CAD tools and methodology. Improves existing algorithms. Acts as a project leader on specific projects. Work on related projects and/or assignments as needed, to meet team goals. Req# IC01680

Verification Environment Developer
A technology related B.S. degree or equivalent combination of training, and 6+ years of related experience. A M.S/Phd degree in EE/CE/CS with 4+ years of related experience is preferred. Requires demonstrated technical expertise in developing functional verification strategy for complex state-of-the-art microprocessor designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Good experience with microprocessor and system architectures, x86 specification, and an in-depth understanding of functional verification debug setups, regression infrastructure, random testing is a requirement. Experience with logic simulation, formal verification, Verilog is a requirement. Direct experience with VCS, Verilog-NC, Speedsim, Chrysalis, a plus. Requires good communication skills. Provides leadership and guidance to junior engineers in the team. Provides technical expertise and strategic direction for developing the functional verification strategy for current and next generation microprocessor designs. Recommends capital equipment needed for production use. Performs project definition, training and documentation. Develops quality, timely and cost effective solutions, very independently. Interfaces with architects and CMD/TMD RTL/logic designers and CAD. Develops an effective working relationship with parties involved. Maintains and enhances existing functional verification methodology. Improves existing infrastructure. Acts as a project leader on specific projects. Work on related projects and/or assignments as needed, to meet team goals. Req# IC01702

Sr. CAD Design Engineer
A technology related B.S. degree or equivalent combination of training, and 4+ years of related experience. A M.S degree in EE/CE/CS with 2+ years of related experience is preferred. Requires demonstrated technical expertise in architecting CAD tools and methodology for complex state-of-the-art VLSI designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Experience with schematic capture, layout entry, place&route tools is a requirement. Direct experience with Mentor DA/IC, Synopsys, Avant! tools is a plus. Requires good communication skills. Provides support to design engineers in the team. Evaluates feasibility of different vendor tool usage in the design of CAD methodology for a new product. Enhances/Supports the CAD methodology development and tools for different designs. Performs evaluation, integration and support of point vendor tools, training and documentation, and acceptance testing. Develops quality, timely and cost effective solutions, very independently. Interfaces with CAD vendors and CMD/TMD designers and CAD to ensure design integration. Develops an effective working relationship with parties involved. Maintains and enhances existing CAD tools and methodology. Improves existing algorithms. Work on related projects and/or assignments as needed, to meet team goals. Req# IC01681

Verification Completeness/Coverage Lead
A technology related B.S. degree or equivalent combination of training, and 10+ years of related experience. A M.S/Phd degree in EE/CE/CS with 7+ years of related experience is preferred. Requires demonstrated technical expertise in architecting functional verification strategy for complex state-of-the-art microprocessor designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Extensive experience with microprocessor and system architectures, x86 specification, and an in-depth understanding of functional verification debug setups, regression infrastructure, random testing is a requirement. Experience with logic simulation, formal verification, Verilog is a requirement. Direct experience with VCS, Verilog-NC, Speedsim, Chrysalis, a plus. Requires good communication skills. Provides leadership and guidance to junior engineers in the team. Provides technical expertise and strategic direction for architecting the functional verification strategy for current and next generation microprocessor designs. Recommends capital equipment needed for production use. Performs project definition, global strategy plans, training and documentation. Develops quality, timely and cost effective solutions, very independently. Interfaces with architects and CMD/TMD RTL/logic designers and CAD. Develops an effective working relationship with parties involved. Maintains and enhances existing functional verification methodology. Improves existing infrastructure. Acts as a project leader on specific projects. Work on related projects and/or assignments as needed, to meet team goals. Req# IC01703

Directed Verification Developer
A technology related B.S. degree or equivalent combination of training, and 4+ years of related experience. A M.S degree in EE/CE/CS with 2+ years of related experience is preferred. Requires demonstrated technical expertise in functional verification strategy for complex state-of-the-art microprocessor designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Experience with microprocessor and system architectures, x86 specification, and an understanding of functional verification debug setups, regression infrastructure, random testing is a requirement. Experience with logic simulation, formal verification, Verilog is a plus. Direct experience with VCS, Verilog-NC, Speedsim, Chrysalis, a plus. Requires good communication skills. Provides guidance to junior engineers in the team. Provides technical expertise for implementing the functional verification strategy for current and next generation microprocessor designs. Performs training and documentation. Develops quality, timely and cost effective solutions, very independently. Interfaces with architects and CMD/TMD RTL/logic designers and CAD. Develops an effective working relationship with parties involved. Maintains and enhances existing functional verification methodology. Improves existing infrastructure. Work on related projects and/or assignments as needed, to meet team goals. Provide support to design engineers in the team. Req# IC01704

Macro Logic Verification Developer
A technology related B.S. degree or equivalent combination of training, and 6+ years of related experience. A M.S/Phd degree in EE/CE/CS with 4+ years of related experience is preferred. Requires demonstrated technical expertise in developing functional verification strategy for complex state-of-the-art microprocessor designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Good experience with microprocessor and system architectures, x86 specification, and an in-depth understanding of functional verification debug setups, regression infrastructure, random testing is a requirement. Experience with logic simulation, formal verification, Verilog is a requirement. Direct experience with VCS, Verilog-NC, Speedsim, Chrysalis, XAT a plus. Requires good communication skills. Provides leadership and guidance to junior engineers in the team. Provides technical expertise and strategic direction for developing the functional verification strategy for current and next generation microprocessor designs. Recommends capital equipment needed for production use. Performs project definition, training and documentation. Develops quality, timely and cost effective solutions, very independently. Interfaces with architects and CMD/TMD RTL/logic designers and CAD. Develops an effective working relationship with parties involved. Maintains and enhances existing functional verification methodology. Improves existing infrastructure. Acts as a project leader on specific projects. Work on related projects and/or assignments as needed, to meet team goals. Req# IC01705

Design Debug/Verification Engineer
A technology related B.S. degree or equivalent combination of training, and 6+ years of related experience. A M.S/Phd degree in EE/CE/CS with 4+ years of related experience is preferred. Requires demonstrated technical expertise in developing functional verification strategy for complex state-of-the-art microprocessor designs. Requires good software development skills, programming with Perl, C/C++ and UNIX. Good experience with microprocessor and system architectures, x86 specification, and an in-depth understanding of functional verification debug setups, regression infrastructure, random testing is a requirement. Experience with logic simulation, formal verification, Verilog is a requirement. Direct experience with VCS, Verilog-NC, Speedsim, Chrysalis, a plus. Requires good communication skills. Provides leadership and guidance to junior engineers in the team. Provides technical expertise and strategic direction for developing the functional verification strategy for current and next generation microprocessor designs. Recommends capital equipment needed for production use. Performs project definition, training and documentation. Develops quality, timely and cost effective solutions, very independently. Interfaces with architects and CMD/TMD RTL/logic designers and CAD. Develops an effective working relationship with parties involved. Maintains and enhances existing functional verification methodology. Improves existing infrastructure. Acts as a project leader on specific projects. Work on related projects and/or assignments as needed, to meet team goals. Req# IC01706

MTS Logic Design Engineer
A minimum of BS in engineering and 6+ years of related experience, or a MS in engineering and 4+ years of related experience. Experience in logic design, place and route, and timing analysis is required. Experience in implementation of high-speed processors is desired. Design Engineer would participate in the design and integration of a next-generation X86 microprocessor. Would be responsible for the logic gate implementation of a portion of the processor including placing, routing, meeting timing goals and completing electrical requirements. Knowledge of computer architecture and circuit design is a bonus as are good programming skills. Req# IC01701, 1C01720 and IC01724

Sr. MTS Logic Design Engineer
A minimum of BS in engineering and 10+ years of related experience, or a MS in engineering and 8+ years of related experience. Candidate should be able to lead a section of the design and integration of a high-performance microprocessor. Experience on one or more successful processor designs is required. Candidate should have broad background including in-depth knowledge of design tools and methodology, architecture and integrated circuit design or analysis. Design Engineer would lead a team to complete a portion of the design and integration of a next-generation X86 microprocessor. Would be responsible for making architectural tradeoffs, leading floor planning efforts, making tool and methodology tradeoffs and other global issues. Req# IC01725 and IC01726

Performance Model Developer, Architect
Model the micro-architecture of a major block of an X86 64 bit microprocessor in conjunction with the chief architect, the rtl team, and other modelers. Write architectural modeling code in C++. Run performance experiments. Requires experience in programming architectural models of a microprocessor -- very good software development skills, C/C++ and UNIX. Experience with computer micro-architecture. Familiarity with out-of-order and speculative execution, register renaming. Knowledge of x86 architecture is a plus. Minimum requirements are a BS in EE/CE/CS, with 3 years experience. MS or PhD preferred. Req# IC01721

RTL Developer
In conjunction with the chief architect and the performance modelers, design the micro-architecture of a major block of an X86 64 bit microprocessor. Specifying the design in an RTL language, work with the verification team to ensure correctness and work with logic implementators and circuit designers to ensure that the design is buildable. Requires extensive experience in microprocessor design with a deep understanding of the implications of micro-architectural decisions. This will include: architectural performance, critical-paths, power and area. Strong debugging skills. Team leadership ability. Strongly self-motivated. Experience with Verilog or VHDL. Knowledge of X86 architecture is a plus. Minimum requirements are a BS in EE/CE/CS with 8 years experience. MS or PhD preferred. Req# IC01722

Performance Model Lead, Architect
Model the micro-architecture of major blocks of an X86 64 bit microprocessor in conjunction with the chief architect and the rtl team. Write architectural modeling code in C++. Run performance experiments. Propose alternative architectural solutions. Requires extensive experience in programming architectural models of a microprocessor -- very good software development skills, C/C++ and UNIX. Extensive experience with computer micro-architecture and an intuituive understanding of the performance implications of micro-architectural decisions. Experience with out-of-order and speculative execution, register renaming. Thorough understanding of performance implications of memory system architecture. Familiarity with parallel processing. Team leadership skills. Self-motivated. Knowledge of x86 architecture is a plus. Minimum requirements are a BS in EE/CE/CS, with 5 years experience. MS or PhD preferred. Req# IC01723

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