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To: mishedlo who wrote (55995)	9/30/2000 12:23:32 PM
From: mishedlo	Respond to of 93625

More Lightning Data Transfer Here's a reply from h0db on Yahoo concerning this notion: AMD's LDT and Rambus Patents by: h0db (40/M/Tysons Corner, VA) 9/30/00 9:32 am Msg: 166287 of 166289 This is potentially a very interesting story. I'm not a patent lawyer or an EE (and you really need to be both!), but here are some descriptions of LTD: About Lightning Data Transport[tm] LDT is an internal chip-to-chip interconnect that provides much greater bandwidth for I/O. It can achieve a bandwidth of up to 6.4 GB/sec per connection. Compared to current system interconnects that run up to 266 MB/sec, LDT provides more than a 20x increase in bandwidth. LDT complements externally visible bus standards such as PCI or SIO, and provides a very fast connection to both. LDT is the connection that can provide the bandwidth the new SIO standard needs to communicate with a server. amd.com Here's a description of a 6.4GB/sec bus topology, using 16-bit packets at 1.6GB/sec/pin--you tell me if this is LTD or a Rambus memory interface: -- Unidirectional point-to-point links in each direction -- Differential signaling with source synchronous clock forwarding Variable widths negotiated at initialization -- Upstream and downstream links can be of different size 16/16-bit link provides 6.4 GB/sec each way Multiple logical channels in each link -- Guaranteed isochronous bandwidth In-band system management and legacy signal transport -- PCI like configuration mechanism So, which is it? amd.com

To: mishedlo who wrote (55995)	9/30/2000 12:25:30 PM
From: mishedlo	Read Replies (1) \| Respond to of 93625

LDT continued Re: AMD's LDT and Rambus Patents by: h0db (40/M/Tysons Corner, VA) 9/30/00 9:39 am Msg: 166291 of 166296 P.s.--this is almost certainly why AMD has been hiring engineers with a background in Rambus. By the way--it was supposed to be included in a chipset by now. They are late. I strongly suspect that AMD has licensed Rambus technology for LDT, not necessarily for an RDRAM application. This is an internal bridge architecture, independent of memory type. But a high-speed, 16-bit interface would seem to go naturally with RDRAM's 800-1000MHz 16-bit characteristics. Posted as a reply to: Msg 166287 by h0db

To: mishedlo who wrote (55995)	9/30/2000 2:25:43 PM
From: Dan3	Respond to of 93625

Re: I was speculating it would be really nice if Lightning Data Transfer is promising, and uses a few Rambus patents LDT is an open standard, there are no royalties for AMD or anyone else. Dan

To: mishedlo who wrote (55995)	9/30/2000 6:27:38 PM
From: mishedlo	Respond to of 93625

REPEATED POST ON LDT I can not believe with all the AMD fans out there, not a single one can say anything about LDT. Post repeated. ======================================================= Lighting Data Transfer Comments on the following post from Artie on the FOOL? AMD is touting a technology, Lightning Data Transfer, that Transmeta seems to be very interested in. I don't know much about it, but I noticed several knowledgeable longs on Yahoo have commented that is perhaps why AMD was hiring Rambus savy engineers. I was speculating it would be really nice if Lightning Data Transfer is promising, and uses a few Rambus patents in places. Hopefully, (unlike DDR)this would be unambiguous and straight forward. Here's an article I found: AMD has major plans for its LDT bus Apr. 29, 2000 (Electronic Buyers News - CMP via COMTEX) -- Silicon Valley-Advanced Micro Devices Inc. is quietly taking the next steps in its journey from component supplier to technology provider by trying to broadly license its proprietary Lightning Data Transfer (LDT) bus technology. AMD is trying to establish LDT as a universal interconnect, a single bus for what Mitchell calls "the bus hodge-podge" of PCI, Accelerated Graphics Port, DRAM, and other dedicated high-bandwidth buses inside a computer. According to Mitchell, LDT design work is taking place in PC chipsets and multiprocessor chipsets, but the bus is also being considered as an integrated I/O link within embedded RISC microprocessors, embedded RISC chipsets, PCI-X bridge chips, and OEM routers and switches. ... The LDT technology was originally designed to provide high-bandwidth connections between the north bridge of a chipset and other bridge chips, whether it was the south bridge or some specific I/O bridge, such as a dedicated Infiniband host controller. The bridges could also be daisy-chained across a single LDT link. ... But AMD sees the technology as being extended "up" into a point-to-point connection for servers, eliminating the microprocessor bus entirely. For 32-bit Athlon multiprocessor systems, Mitchell disclosed that a superset of the LDT specification, or "coherent LDT," has been developed for non-uniform memory-access matrixes, where arrays of processors can access dedicated local memory as well as "distant" memory that is attached to other CPUs. Mitchell also said that the forthcoming Sledgehammer 64-bit microprocessor will contain an integrated north bridge with an LDT connection... Message 13529688 Artie