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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: jim kelley who wrote (56037)	9/30/2000 8:52:18 PM
From: Bilow	Respond to of 93625

Hi jim kelley; Actually, what you write is the essential difference between the purpose of the RDRAM memory latency register and the SDRAM memory latency register. What you are describing is the Rambus use. In SDRAM, the use of the register is to allow the same chip to provide lowest latency over a range of clock periods. -- Carl

To: jim kelley who wrote (56037)	9/30/2000 10:54:59 PM
From: jim kelley	Respond to of 93625

The use of a wire from a memory controller to every chip in the memory array is no small matter. If the wire is connected daisy chain throughout the memory array the signal will reach it chip at a different time. In order, to ensure that such a mechanism would work properly the signal would have to be topology independent. RAMBUS has a patent on a topology independent timing signal. Also the signal would have to drive a large fanout load in large memory systems. Routing an extra wire through every dram in a memory array is not desirable. I suppose that is why they put the original delay register in the controller. Scumbria's design is definitely less than state of the art. No doubt this is why he is in management now. <G>