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To: Dan3 who wrote (56932)10/7/2000 11:58:46 AM
From: Scumbria  Read Replies (1) | Respond to of 93625
 
Dan, John,

Cache coherency must be maintained throughout the cache hierarchy. Any memory access that snoops a non-exclusive L2 line, will also have to snoop the L1 of both processors.

Having a shared L2 reduces die cost, but at the expense of performance.

Scumbria