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Technology Stocks : Alliance Semiconductor -- Ignore unavailable to you. Want to Upgrade?


To: Ram Seetharaman who wrote (8784)10/19/2000 1:32:17 AM
From: DJBEINO  Respond to of 9582
 
UMC (2303) closed @ 48.90 -3.60 vol 42,581,284 3rd most active
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TAIWAN WEIGHTED closed @ 5081.28 -350.95 (-6.46%)
Day's Range :5074.44 - 5284.34
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Taipei, Oct. 19 (Bloomberg) -- Taiwan stocks plunged as individual investors who bought shares on credit were forced to sell after the key index lost a fifth of its value in under two weeks. Taiwan Semiconductor Manufacturing Co. led declines.

The TWSE Index lost 356.64, or 6.6 percent, to 5075.59 and is on course for its lowest close since April 1996. In U.S. dollar terms, the index is the world's second-worst performer in the last month on concerns slackening demand for personal computers will slow the electronics industry's earnings growth and amid worry about the government's stability.
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TAIPEI (Dow Jones)--Thursday's 6.5% fall in the bellwether stock market was due to margin calls from Wednesday's losses and weakness in international stocks



To: Ram Seetharaman who wrote (8784)10/19/2000 2:00:45 AM
From: DJBEINO  Read Replies (1) | Respond to of 9582
 
new patent for alsc

Method of reducing dielectric damage due to charging in the fabrication of stacked gate structures
Abstract

A method of fabricating structures to reduce dielectric damage due to charging is easily incorporated into existing stacked gate fabrication processes. The conductive layers are patterned to form structures which are coupled to the substrate by a current passing device. Each current passing device is isolated from the control gate structures toward the end of the etch process, thereby providing a discharge path for the control gate structures throughout substantially all of the stacked gate etch step. First and second conductive layers are patterned with one or more masks to create stacked gate structures. The multiple masks minimize the exposed area of the second conductive layer during the etch process and so reduce the amount of charging on the gate structures. Each current passing device is preferably an interconnect via coupling the second conductive layer to the first conductive layer. The discharge path allows charge to travel from the second conductive layer through the via to the first conductive layer. From the first conductive layer the charge can travel to the substrate through a buried contact structure.

Inventors: Shrivastava; Ritu (Fremont, CA); Reddy; Chitranjan N. (Los Altos Hills, CA).
Assignee: Alliance Semiconductor Corporation (San Jose, CA).

company.sleuth.com