To: dougSF30 who wrote (126522 ) 10/19/2000 9:33:43 AM From: Daniel Schuh Respond to Didn't I read (was it the dreaded PengEL?) that they may have even come up with a clever way to skirt any contractual obligations to the BUS: Allow for some optional graphics buffer memory to be of the BUSted variety. Probably no motherboards would actually choose to *implement* it, but supposedly, it would suffice for the legal dept. inqst.com , many have picked up on it since then. There remains one final shocking feature of Almador that has not yet surfaced in the industry rumor mill. The 810 and the 815 both support a small 32-bit 133MHz 4Mbyte SDRAM graphics memory option, which is used for Z-buffer data by the integrated graphics controller. Intel calls this feature a ‘Display Cache Controller’ or DCC. When this additional SDRAM bus is populated, it can improve the performance of some 3D applications by a small margin, but even with this feature activated, the 810/815 3D performance is still entirely uncompetitive for serious 3D. As a result, few OEMs or board makers are actually populating this extra memory bus. Knowing this, Intel has also defined an external SDRAM module option that will allow an OEM the option add this Display Cache SDRAM for some configurations, without burdening all of its customers.
