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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Dan3 who wrote (58420)10/21/2000 7:34:15 PM
From: Jim McMannis  Respond to of 93625
 
RE:"Everything I've seen indicates that the significant patent is for using an on chip register to control interface timing."

Seems to me that JEDEC or somebody should already be designing around Rambus' DDR claims just in case.
Is this happening?

Jim



To: Dan3 who wrote (58420)10/21/2000 8:03:19 PM
From: Zeev Hed  Read Replies (1) | Respond to of 93625
 
I believe that that relates more to SDRAM. The double data rate (reading both sides of the clock pulse) as it is implemented in random access memory is probably the controlling technology for DDR, you'll have to come up with another clocking scheme. Multilevel clocking is also locked up.

Zeev


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