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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Bilow who wrote (58434)	10/22/2000 11:24:00 AM
From: Zeev Hed	Read Replies (2) \| Respond to of 93625

Carl, as I have stated before, I have not analyzed in detail th whole body of RMBS' IP, nor the prior art on which it is based. What "seems obvious" after the fact, is not always obvious prior to someone actually going through the reduction to practice steps. I'll give you a simple example from my own experience. It is "obvious" that an SC is a perfect mirror to wavelengths equal the binding energy of Cooper pairs. Yet, it occurred to no one until the early 1990'. Then both Lawrence Livermore and myself obtained patents on such mirrors (I had to give up my own "specular mirror" claims, since the Livermore team filed about two months before me, but to the Livermore team, the Lambertian reflector was not obvious, so I got the claims on on lambertial perfect mirrors). What is more interesting, is that it should have been "obvious" to now make a "switchable mirror", the Lawrence team, did not think of it, I did and got this "locked" up. It is the same with all your comments, these innovations may be obvious, once someone tells you, "how about doing it this way". The implementation as communication standards between various chips and the inclusion of specific functions as well as the use of special methods (the method of using the rise time and decay time as two "independent clock" events in synchronizing when prior to that, at least in DRAM's, only the rise time was taken as a standardizing clock event), until RMBS told the DRAMURAI, "hey, how about doing it this way". I have also explained before that the unique trade offs required when trading very short latencies for "true random" access with longer latencies, for what I would call "quasi random" access (but much larger "packets" of data) in order to obtain overall increased performance, is far from obvious, and that is, as far as I understand, why the inclusion of the register on the dram chip itself, is so critical, and far from obvious. Can that be overcome, of course, and partial solutions with embedded DRAM do just that (which is really an extension of large caches in processors). Right now, however, I would say that whether RMBS win or lose its IP battles and to what extent these cover DDR and SDRAM, is beyond my ability to determine (even if I took the time and studied the whole body of IP out there). Zeev

To: Bilow who wrote (58434)	10/22/2000 12:02:32 PM
From: sylvester80	Respond to of 93625

Bilow, It's not that simple on the Rambus patents. I have yet to see anything substantial from Hyundai, Micron and Infineon on overturning the patents. In fact, I'm seeing more of them going to other desperate measures, like anti-trust, rather than try to invalidate the patents themselves. that tells me that the 3 don't have a clue and don't have a case. And not only that. But we are talking here them having to invalidate all the Rambus patents in question, not just one or two. The 3 have a hell of an uphill battle and a hell of a lot to lose

To: Bilow who wrote (58434)	10/22/2000 12:12:01 PM
From: mishedlo	Read Replies (1) \| Respond to of 93625

Carl Help me out here People keep posting about Rambus collecting royalties on SDRAM chipsets and memory controllers. I keep asking how and I never get a response. Please assume (for the sake of argument) all of Rambus IP stands up in court. Translate that IP into royalties on the various chipsets and memory controllers for me. Memory itself is obvious - thanks. It must be a tough job because no one is willing to try. Please bear in mind my limited technical nature, but if it has to be technical or you wish to do it both ways, by all means, please give it a shot.