Excerpts from Xilinx pr pieces....
The integration of Conexant’s innovative SkyRail CMOS transceivers within the Xilinx Virtex-II FPGA architecture creates a single chip with the ability to offload multi-gigabits of serial data streams. The unprecedented combination of gigabit interconnect technologies coupled with embedded processors and related IP within an industry-standard FPGA will allow designers to create highly integrated solutions for high-speed networking, telecommunications and storage arrays.......
The high-speed transceiver is also compliant with the 2.5 Gbps InfiniBandTM architecture standard being created by the InfiniBand Trade Association. Member companies include Intel, Cisco Systems, IBM, Sun Microsystems, Hewlett-Packard and Microsoft.
On I/O...
XILINX ESTABLISHES LEADERSHIP DIRECTION
FOR HIGH-BANDWIDTH I/O TECHNOLOGIES
On tap are LDT, POS-PHY4, 3.125Gbit, Infiniband, XAUI, RapidIO,
and Fibre Channel for FPGAs;
Virtex-II architecture to break 10 Gb/sec barrier next year
SAN JOSE, Calif., September 25, 2000—Xilinx, Inc. (NASDAQ:XLNX), the leader in programmable logic, today announced an aggressive plan to provide high-bandwidth interconnect technologies for its FPGAs that will break the critical 10 Gigabits per second (Gb/sec) bandwidth barrier within the next year. Users can anticipate implementing these high-bandwidth interconnect technologies in the next generation VirtexTM-II architecture.
High bandwidth interconnect technology is becoming increasingly necessary as FPGAs are used more and more as critical components in communications equipment. In addition to enabling much higher device performance, high bandwidth I/Os free-up package pins that were traditionally used as parallel I/Os. They also minimize switching related problems and drastically reduce power dissipation thereby enhancing device reliability in high bandwidth applications.
"The integration of very high bandwidth interconnects and the previously announced IBM PowerPC processor core within our Virtex-II architecture will offer customers the most flexible, fastest time-to-market development platform in the industry," said Dennis Segers, senior vice president and general manager of the Xilinx Advanced Products Group. "The Internet economy has accelerated the need for these high-bandwidth interconnect standards. The breadth of standards that will be supported by Xilinx will ensure that system architects have flexible solutions for their emerging networking applications."
The Xilinx direction includes physical layer support for the following popular high-bandwidth interconnect standards and applications:
Lightning Data TransportTM (LDT): A chip-to-chip interconnect that provides much greater bandwidth per I/O. It can achieve a bandwidth from 6.4 Gb/sec per eight wire link width, and can support up to 32 links. Applications include boards utilizing PCI and SIO, for example PC motherboards.
POS-PHY4 (PL4): A 13.3Gb/sec parallel link layer to physical layer interface for packet and cell transfer over SONET for OC-192c and 10 Gb/sec Ethernet applications. POS-PHY4 is a 16-bit point-to-point interconnect with 832 Mb/sec per bit signaling utilizing double data rate clocking.
InfiniBandTM: Promoted by an association comprising industry's leaders such as, Compaq, Dell, HP, IBM, Intel, Microsoft and Sun Microsystems, the focus is to develop a new common I/O specification to deliver a channel based, switched fabric technology. The newly designed interconnect utilizes a 2.5 Gb/sec wire speed connection with one, four or twelve wire link widths. Applications include remote storage devices and servers.
XAUI: A quad transceiver utilizing 3.125 Gb/sec serial links to create a 10 gigabit attachment unit interface (XAUI). Multiple XAUI interfaces can be implemented to allow a single chip to interface to both 10 Gigabit Ethernet and OC-192c.
Fibre Channel: A high-bandwidth serial standard offering 1.06 Gb/sec baud rates scalable to 2.12 or 4.24 Gb/sec. Capable of carrying multiple existing interface command sets, including Internet Protocol (IP), SCSI, IPI, HIPPI-FP, and audio/video.
Gigabit Ethernet + 10 Gbit Ethernet: This includes devices compliant with the IEEE 802.3 alliance. Applications include LANs and access and aggregation equipment in the Internet edge space.
ATM (OC-12, OC-48, OC-192): This includes support for OC-12 (622 Mbps), OC-48 (2.4 Gb/sec) and OC-192 (10Gb/sec). Applications include WANs, MANs, and access and aggregation equipment in the Internet edge space.
RapidIOTM : A next-generation switched-fabric interconnect architecture for embedded systems that is optimized for both high bandwidth and low latency. Initial implementations are expected to exceed 1.0 Gb/sec throughput based on clock rates from 250 MHz and higher. Applications will include embedded systems in the networking, multimedia, storage and signal-processing sectors.
Integrated serialization and deserialization (SERDES) and clock and data recovery (CDR) are also included within Xilinx high-bandwidth interconnect technologies.
High-bandwidth I/Os have traditionally been developed using high performance processes such as gallium arsenide. By contrast, the Xilinx direction of its high-bandwidth interconnects will be developed using CMOS process technology. By using the established CMOS technology, Xilinx FPGAs can meet the performance requirements of the emerging high-bandwidth interconnect standards, while consuming much less power than solutions implemented in other process technologies.
"Interconnect bandwidth needs are outpacing Moore’s Law relative to current I/O standards, so we anticipate a dramatic shift to the new, higher bandwidth interconnect technologies," said Bruce Weyer, senior marketing director of the Xilinx Advanced Products Group. "The flexibility of Xilinx FPGA architectures have proven to be an enabling technology for our customers as they transition to new standards."
Xilinx FPGAs are often used to translate differing I/O standards—a grand central station for I/O switching. System architects must integrate these I/O standards while maximizing performance and minimizing board real estate and cost. Xilinx FPGAs address this with support for 20 different I/O standards today. For example, Xilinx Virtex FPGAs support the SSTL I/O standard used in SDRAMs, the HSTL I/O standard used in SRAMs, the GTL+ I/O standard used in the backplane of Pentium-based systems, and LVDS, the I/O standard used in low EMI networking applications.
XILINX ANNOUNCES ACQUISITION OF ROCKETCHIPS
Merger provides Xilinx with ultra-high-speed CMOS transceiver technology
SAN JOSE, Calif., October 3, 2000—Xilinx, Inc. (NASDAQ:XLNX) today announced an agreement to acquire RocketChips, Inc, a privately-held fabless semiconductor company. Headquartered in Minneapolis, Minnesota, with design centers in Austin, Texas and Ames, Iowa, RocketChips is a leading developer of ultra-high-speed CMOS mixed-signal transceivers serving the networking, wireless and wired telecommunications, and enterprise storage markets.
The CMOS serial revolution
The traditional workhorse of system-level interconnect has been the parallel bus, exemplified by such well-known standards as PCI. With increasing data rates, however, parallel busses have struggled to keep up in terms of speed, power, signal integrity, and size (pin count). As a result, system architects are turning to high-speed serial interconnect technology, which provides dramatic improvements in bandwidth, pin-count, power, and signal integrity. Serial backplane architectures are expected to grow from 5 percent to 100 percent of network system architectures over the next few years.
Traditional serial transceivers, while fast and more pin efficient, are largely based on non-mainstream GaAs and Bipolar processes. These designs consume significant power levels, and their processes preclude integration into complex CMOS devices such as FPGAs and other networking components. Recent breakthroughs in CMOS circuit design and modeling have enabled next-generation serial transceivers to be constructed using standard CMOS processes, thereby dramatically lowering power levels and at the same time enabling integration into large-scale high-integration CMOS devices such as FPGAs.
RocketChips' gigabit and multi-gigabit serial CMOS transceiver technologies provide solutions for a wide range of serial system architectures in the networking, telecommunications, and enterprise storage markets served by Xilinx® FPGA technology. Solutions comprise serial backplane transceivers (Single and Quad 3.125 Gb Transceivers), telecom transceivers (SONET OC-48 and OC-192), enterprise storage transceivers (Fibrechannel, Ethernet), and networking transceivers (Gigabit Ethernet, 10 Gb Ethernet, and Infiniband). When combined with next-generation Xilinx FPGAs comprising high-performance million-gate programmable logic technology as well as leading-edge PowerPC® RISC processors, they enable the high-bandwidth data rates, wire-speed data processing, and interoperability demanded in advanced networking, telecom, and enterprise storage solution designs. These markets collectively represent an incremental FPGA market opportunity of over $6 billion.
"This acquisition is a step function in the evolution of FPGA technology as a preferred platform for networking, communications, and storage server designs," said Dennis Segers, senior vice president and general manager of the Xilinx Advanced Products Group. "The combination of CMOS gigabit-serial transceivers and our market-leadership FPGA solutions promises to provide dramatic system-level benefits to our customers. Moreover, we are excited by the addition of RocketChips’ specialized expertise to our team, and we expect to rapidly expand our new design centers in Minneapolis, Austin, and Ames in keeping with our aggressive investment in research and development."
"We are extremely pleased to join forces with Xilinx," said Raymond R. Johnson, CEO and president of RocketChips. "The synergy of our technologies and expertise enables a step-function increase in system-level capabilities. We look forward to working together in driving the next revolution in FPGA technology."
Terms of the acquisition were not disclosed. The acquisition will be accounted for under the purchase method of accounting. In the future, Xilinx will begin to report earnings per share on an earnings before goodwill basis (EBG), which is not expected to be materially impacted.
Xilinx will conduct a conference call today (October 3) at 1:00 p.m., Pacific Time. The conference call number is 415-908-6243. A recorded playback of the conference call will be available for 48 hours upon the conclusion of the call. The call-in number for the replay is 800-633-8284 (passcode:16528175).
About Xilinx
Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, Calif., Xilinx invented the field programmable gate array (FPGA) and fulfills more than half of the world demand for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at xilinx.com.
About RocketChips
RocketChips, Inc. was founded in January, 1997, by Dr. Bernard L. Grung and Raymond R. Johnson. Dr. Grung has extensive expertise in the areas of high-speed mixed-signal circuit design and the device physics of GaAs, BiCMOS, and CMOS circuit elements. He pioneered the development of high-speed CMOS circuit topologies capable of achieving GaAs performance levels. He is the co-author of three books on IC devices: MOSFET Theory and Design, Semiconductor-Device Electronics, and Transistors: Fundamentals for Integrated Circuits Engineer. He received his BS, MS, and PhD degrees from the University of Minnesota, and previously held senior technical positions at VTC and the Honeywell Physical Sciences Center. Mr. Johnson brings 18 years of executive level experience in management, strategic planning, marketing and worldwide sales for high-tech companies, with extensive expertise leading and managing both domestic and international business and product development teams. Mr. Johnson previously held senior management positions at Honeywell. The company currently has over 60 employees and specializes in ultra-high-speed designs using conventional CMOS technology. For more information, visit the RocketChips web site at rocketchips.com.
WIND gets an opportunity of large proportions to make a huge move in embedded software.
Xilinx seems to have no bias to any i/o protocol may get to use development work to make products for all the i/o markets. On the surface the Rocketchip (what a great name for the company) looks like a great move.
Higashii, You'll like the headline on Rocketchip home page...
rocketchips.com
Any help out there? |
