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To: Joe NYC who wrote (16489)10/29/2000 2:09:34 AM
From: THE WATSONYOUTHRespond to of 275872
 
On the die itself? If (when) we get to the point that you could have 16MB on the same die as the processor, why not make it SRAM L2? How many transistor do you need for DRAM cell vs. SRAM? Embedding DRAm on chipset has advantages for a traditional processor, but what happens if a processor has an on-die Northbridge?

I think embedded DRAM for a one chip solution for graphic accelerators is likely. Eventually (probably at .10um) you can expect to see embedded DRAM on the processor itself. I wonder how good this Micron embedded DRAM chipset will be. If it is exceptional, Intel will likely have to follow. Perhaps this is why they are teaming with TSMC for chipset production. They probably want to use their .13um process as well as get a look at these embedded DRAM chipsets.(TSMC has a good embedded DRAM process) I would guess Intel all ready is working on designs as well. Maybe long term, both Intel and AMD will have to develop DRAM processing capability.

THE WATSONYOUTH



To: Joe NYC who wrote (16489)10/29/2000 8:41:51 AM
From: dale_laroyRead Replies (1) | Respond to of 275872
 
According to Paul DeMone, who designs embedded DRAM, many times the amount of embedded DRAM can be integrated onto the chip as SRAM. A DRAM cell consists of a single device, whereas SRAM typically runs from 4 to 6 devices. And on-die DRAM is nearly as fast as SRAM, especially if wide data paths are used to transfer content between SRAM and DRAM. Wide data paths can not be used with external memory, even with an embedded NorthBridge. The down side is that eDRAM uses special fabrication techniques that compromise the speed bin of the processor. The result could easily be an Itanium clocked Sledgehammer with hellacious throughput in a server environment.

I wasn't even half serious about the potential of AMD using eDRAM in Sledgehammer however. Generally a fab is large enough that more than one process technology can be accommodated. For example, AMD could run both Aluminum and Copper in Dresden concurrently. Best guess is that, if AMD were to buy into Micron's fab, it would have processor optimized lines for production of Sledgehammer, eDRAM capable lines for production of chipsets with eDRAM, and standard DDR DRAM production lines. Best guess is that high end consumer processors (currently T-Bird class) would integrate the NorthBridge, so the chipsets would be for low end Socket-A systems, having eDRAM for their integrated Rendition GPU.