Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: Elmer who wrote (115244)	10/30/2000 4:45:07 PM
From: muzosi	Read Replies (1) \| Respond to of 186894

If the layout was complete then they'd be taping out now. That's like saying the wafers are out of fab and we'll be testing them by year's end. I wish I lived that world where after "layout complete" one didn't have to run LVS/DRC and transistor level simulations, didn't have to do back-annotation for functional and timing verification. Of course one can claim that layout can't be complete without doing these but I'd submit that would be redefining the original statement. Muzo