Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: muzosi who wrote (115273)	10/30/2000 9:12:46 PM
From: Elmer	Respond to of 186894

Re: "As I mentioned before, it is a project management issue. As a milestone, "layout complete" is meaningfully different from "layout verified". It is not an engineering issue but scheduling convenience. You want to measure how long it takes to generate tape-out ready layout after you get an LVS clean one" OK so it's a milestone that gets checked off on the foils. But until it's verified it's rather meaningless to pretend it's complete. It's complete until you start fixing it. EP