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To: Pat Hughes who wrote (60227)11/5/2000 1:38:38 AM
From: Barry Grossman  Read Replies (1) | Respond to of 93625
 
Alta Vista's Babelfish site gives this not to good translation:

babelfish.altavista.com

Processor whisper

Actually Intel wanted to present the Pentium 4 on 30 October, but that must probably wait now by 20 November. A bug in the appropriate Tehama Chipsatz (i850) is debt at the delay. Tja, and actually wanted to use AMD 30 October, in order to offer evenly to this Pentium 4 with a new generation of Athlon PCUs Paroli. Now is the Athlon with 133-MHz-FSB alone there and proves on the new: AMD has for the moment the nose in front.

Intel has lately really pitch: Only the RAM bus disaster, then the bug in the Pentium III with 1,13 GHz, then inglorious dying of the Timna project as well as the shift of the Pentium-4-Vorstellung to 20 November. And now AMD comes just at the burst ' Pentium-4-Day ' with new Athlon PCUs on the market, which operates with a FrontsideBus of 133 mc/s in the double DATA rate procedure. To all abundance AMD supplies also still in time the suitable chip record (AMD760) in addition, which operates instead of expensive RAM bus chips with relatively inexpensive GDR SDRAMs.

So far the Athlons and Durons with a FSB clock ran from 100 mc/s in a GDR procedure, which leads 100 mc/s x 2 = 1.6 GByte/s to a theoretical bandwidth of 64 bits x. With 133 mc/s the bandwidth rises to 2,1 GByte/s. The past SDRAM memory achieves even times 800 MByte/s, the PC133-Module with 1 GByte/s with 100 mc/s (PC100) also not many more. With parallel data communication to the diagram card by AGP-2X (500 MByte/s) or AGP-4X (1 GByte/s) the memory interface brakes the PC thus out. The GDR INTERFACE offers more air: With 100 mc/s clock (PC200 or PC1600 called) achieves it 100 mc/s x 2 x 64 bits = 1.6 GByte/s and with 133 mc/s (PC266, PC2100) 2.1 GByte/s - matches perfectly the new Athlon.

The FSB133-Athlons uses the same Thunderbird core of the current Athlons and appears likewise in the PCGcA HOUSING for the base A. whether it in current Main boards with VIAs KT133-Chipsatz functions, is doubtfuly. According to manufacturer many boards can be adjusted to FSB133, but to test that could do so far nobody. VIA it is to tinker anyhow at the successor KT13Á with permission for FSB133 which a note to the fact would be that for a long time all KT133-Mainboards did not stand the fast FSB clock.

Caught up
AMD wants to bring processors with 1000, 1133 to up to 2000 mc/s on the market, which are somewhat more expensive with same clock than their FSB100-Kollegen. To differentiate one can do it on the basis the last letter of the type identifier: With the A1000AMT3B ' B ' is for FSB100, a ' C ' FSB133 would mean. Although somewhat inaccurate, the designation will probably become generally accepted ' FSB266 ' or ' 266-MHz-Bustakt ' with the new models likewise like FSB200 with the current.

The likewise presented chip record AMD-760 supports excluding GDR SDRAM. With the current PC100 or PC133-Modulen he can begin thus nothing. Who would like to use it further, must wait for the VIA KT266. The GDR memory does not operate always synchronously to the FSB. from VIA Chipsaetzen admitted operation with 100 mc/s on the FSB and 133 mc/s on the memory bus controls the AMD-760 thus. Further to the chip record as well as first of bench mark gabs already on page 14.

But thus not enough. Intel must deliver probably the SPECfp crown again at AMD. If Intel with the gigahertz Pentium III on the OR840-Board with two RAM bus channels had been able to obtain still another SPEC2000fp_base of 324 and a fp_peak value of 335, AMD caught up now: Already with normal PC133-Speicher and 1.2 mc/s clock came the AMD system to a fp_base value of 304 and one fp_peak from 342. With the Intel systems transferred from PC100 on the VC820 with a RAM bus channel about 20 points, the step of the VC820 brought to the OR840 further 20. There one can be only strained on AMD values with GDR memory and FSB133.

Apropos RAM bus: So far official AMD sources always disclaim that one operates also on chip corroding for this memory type. Who studies the current data book to the AMD-760 however attentively, therein suspicious referring to a ' AMD Rambus Chipsatz ' find with the identifier ' 0x700A ' with the reserved PCI DEVICE IDs. The ID ' 0x7008 ' is intended for a dual processor RAM bus chip record. The dual version with GDR SDRAM will then probably carry the designation ' 0x7004 ' after this document.

Intel can offer meanwhile only two new Celeron versions 733 and 766 mc/s. The two are to come on 13 November on the market. Naturally there are still unites rumors approximately around a new Roadmap. Therefore start is to see next yearly nevertheless still the Pentium III with 1,13 GHz the light of the processor world; with a ' Coppermine T' core and a reduced core voltage. It does not concern probably yet ' Tualatin ', that in 0,13 µm manufactured copilot by mine, because this is only for the third quarter 2001 on the plan. At this time the ' Coppermine t ' is to put - abgespeckt on 128 KByte L2-Cache - into the Celerons with 900 mc/s and more. After these Roadmap wants Intel start next yearly for conclusion to finally make with the FSB clock of the Celeron kastrierten on 66 mc/s and the 800-MHz-Version with 66 and 100 mc/s FSB to offer. The Pentium 4 is to achieve 1.7 GHz in the first quarter and in second proud 2 GHz. But whether this timetable functions completely without delays...

Embedded fragment
SPEC bench mark are not suitable as well known for the efficiency comparison of Embedded PCUs like the NEC VR5432. The EEMBC ( EDN Embedded Microprocessor bench mark Consortium ) sketched therefore new bench mark, which supplies reference values for this PCU CLASS. With first test runs NEC with the VR5432 (167 mc/s) could shine already times. There one may be thus strained, as the announced version with 200 mc/s strikes itself. It orders like their predecessor over 64 KByte internal Cache and six parallel operating functional units, under it also a POINT unitunit POINT unit.

From German landing originates the E1-32SX, which the manufacturer hypertone had presented on the Embedded of system in San Jose. Its instruction set tries to combine the advantages of RISC and DSP in a processor core. Its three functional units (RISC ALU, DSP core, load/net curtain unit) can operate parallel and access 96 registers as well as 16 KByte internal static RAM. The Design permits clock rates up to 180 mc/s and is in the power down mode only 2 mA current to take up, in the Sleep mode to even only 10 µA. ( gs )

Prices of the AMD Athlon
Core clock FSB100 FSB133
1.2 GHz 612 US-$ 673 US-$
1.133 GHz - 506 US-$
1.1 GHz 460 US-$ -
1 GHz 350 US-$ 385 US-$
950 mc/s 282 US-$ -
900 mc/s 215 US-$ -
850 mc/s 193 US-$ -