To: jcholewa who wrote (19511 ) 11/17/2000 9:54:22 PM From: milo_morai Respond to of 275872 Page 6 AMD System Bus Technology August 28, 2000 Table 2: Processor Bus 4-Way Multiprocessing Bandwidth Comparison AMD Seventh Generation AMD Athlon processor ™ System Bus Intel Previous Generation Pentium ® III (P6) Bus 200-MHz bus bandwidth (up to 50% more peak bandwidth than any other x86 system bus), scalable to 400 MHz 133-MHz bus bandwidth Point-to-point dedicated architecture based on Digital’s Alpha™ EV6 technology – a superior, higher-bandwidth bus solution for multiprocessing platforms Available bus bandwidth is shared, which limits clock frequency Source synchronous clocking (clock forwarding) Common clock limits frequency 1.6 Gbytes/sec per processor bandwidth for 4-way system configuration 250 Mbytes/sec per processor bandwidth for 4-way system configuration 24 outstanding transactions per processor 4-8 outstanding transactions per processor AMD Athlon™ Processor Point-to-Point Bus 4-way Pentium ® III P6 Shared Bus The AMD Athlon processor system bus architecture uses 64-byte burst data transfers, thereby delivering up to 50 percent more peak bandwidth than any other x86 system bus. In addition to providing significantly higher data bandwidth, the AMD Athlon processor system bus enables more efficient cache utilization by defining a flexible cache control policy, which is managed by the system chipset. By including the cache control policy within the system chipset, chipset developers can design a variety of system-level features or configurations for different markets. The AMD Athlon processor system bus also implements a MOESI (Modify, Owner, Exclusive, Shared, Invalid) cache control policy—the first such implementation for x86 processors. Since the AMD Athlon processor system bus has separate, dedicated high-speed channels for processor requests to the system and snoop requests from the system, AMD Athlon processors are not limited to the strict and long “arbitration-address transfer-snoop response-data transfer” protocol used by the Intel P6 bus. AMD Athlon processors can send up to 24 outstanding transfer packets—three times as many as the newer Intel P6amd.com Wonder why they chose to use a 4-way example in this White Paper? Milo