SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: that_crazy_doug who wrote (20320)11/23/2000 11:57:08 AM
From: fyodor_Respond to of 275872
 
<doug: the answer is memory bandwidth and double precision floating point (with the correct optimizations). Are these 2 things going to overshadow everything else moving forward? (similar to how fp overshadowed int during the p5 -> p6 transition)>

I guess I tend to look at it a bit backwards (well, I think you are looking at it backwards ;p). With the P4, Intel "fixed" the major weaknesses of the P3: FP (esp. double precision) and bandwidth... not to mention ability to clock much higher.

I don't honestly know how big a role double precision FP will play in the future.

Heck, I don't even know what type of instructions MPEG encoding uses. Anyone??? (I really want to know - Tom seems to say FP, possibly dp FP).

-fyo



To: that_crazy_doug who wrote (20320)11/23/2000 3:07:19 PM
From: jcholewaRead Replies (1) | Respond to of 275872
 
> The memory bandwidth issue will be less of a factor because AMD could always come up with a similar platform.

Don't throw that away so easily. It's not easy to increase your chipset speeds by 75% in a short period of time.

&nbsp;&nbsp;&nbsp;&nbsp;-JC