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To: TQOM1 who wrote (88230)11/25/2000 12:25:38 PM
From: foundation  Read Replies (1) | Respond to of 152472
 
"Basically, all things being equal, one would be able to pack more information on a wider channel."
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<g> That's a whopper!

"In theory WCDMA enhances the advantages of CDMA by expanding fourfold the spread (or so called "chipping rate") in its "spread spectrum." Thus, each signal is spread more widely by a higher chipping rate, each bit is lower power, rendering the resulting background noise even more Gaussian (a smoother more random appearing hum against which to search out the signal). Since more users are sharing a single channel, the statistical multiplexing advantages of variable rate vocoding are enhanced.

The law of large numbers, however, suggests that at some point "large" becomes "too large" and returns beyond this point diminish. Before settling on a 1.25 MHz spread almost a decade ago, Qualcomm sage Klein Gilhousen studied a range of spectrum widths and chipping rates for expanding the signal. He found that an eightfold increase, from a chipping rate of 16 to 128, produced a 20 percentage point increase in spectral efficiency. By increasing the rate another eightfold to 1024 over 10 MHz, however, the WCDMA proposal of the time would yield less than half that increase, about 9 percent. The current WCDMA proposal would yield about 6 percent greater spectral efficiency.

In the real world of limited spectrum, the right channel width must reconcile the advantages of channel spread with the need for channel flexibility. More channels are easier to swap from voice to data and back again to accommodate shifting demand during the course of the day or to offer bandwidth on demand.

While gaining paltry and diminishing returns in spectral efficiency, the wider spread incurs real and rising costs in chip set complexity and handset power. Operating across a wider spectrum, a WCDMA rake receiver must process three times as many signal elements in the 156 microseconds available, requiring more rake components, each operating three times as fast. The result is more complex and expensive chips, more silicon area, more power consumption, and ultimately, perhaps, lower performance. (G.G.)

Message 14557674