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To: combjelly who wrote (20649)	11/27/2000 12:00:02 PM
From: Daniel Schuh	Respond to of 275872

"Smarter compilers" was the battle cry for Itanic, for the last 5 years at least. There's tradeoffs in that kind of stuff, and considering the rather broad hardware base they have to get things to run on, it's understandable that Microsoft would be conservative. They got enough trouble with bugs that are really bugs, not to mention Intel's numerous erratanotbugs, without dealing with compiler glitches. It's all very nice for Intel to deprecate all the existing compiled code that doesn't look good on the P4 as "legacy", but to repeat again, legacy is about all the x86 architecture has going for it. On pure computer architecture grounds, it looks like a pile of warts. Intel piling on another 150 instructions every year isn't going to make a silk purse out of a sow's ear, it just makes the pile of warts higher. Cheers, Dan.

To: combjelly who wrote (20649)	11/27/2000 1:02:17 PM
From: fyodor_	Respond to of 275872

combjelly: I mentioned SSE2 instead of SSE because of the integer operations Integer code often doesn't exhibit the same degree of ILP as floating point code. I think Intel acknowledged this with the P4, where the integer portion is heavily reworked, while the FPU remains fairly unchanged. The addition of SSE2 served two purposes: a) Addressing the weakest part of the PIII FPU (relative to the Athlon, as well as most server chips) - double precision floating point. b) A "new improved MMX". ... but there is still a lot of wiggle room in normal code [for implementing vector ops]. I think the Intel employees who worked with the FlasK MPEG4 encoder over at Tom's Hardware demonstrated a valuable lesson: A good compiler with sensible settings can result in a quick, free 100% increase in performance. Way, way too many programs out there are poorly compiled. In many cases, proper data alignment would probably do a lot more (and more easily) to improve performance than vectorization. -fyo