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To: DJBEINO who wrote (8997)	12/7/2000 7:14:46 AM
From: DJBEINO	Read Replies (1) \| Respond to of 9582

NEW patent added to ALSC United States Patent 6,157,587 Reddy, et. al. Dec. 5, 2000 Data sense arrangement for random access memory Abstract A sensing circuit (30) for a random access memory (10) is disclosed. A CMOS sense amplifier (32) is coupled between bit line pairs which connected to I/O lines by a passgate (N4/N5). A pair of cross-coupled transistors (N6/N7) activated in synchronism with the passgate (N4/N5) is also disposed between the bit lines. The I/O line pairs each include a pair of cross coupled p-channel transistors (P4/P5). The combined action of the cross-coupled pairs (N6/N7) and (P4/P5) increase the sensing speed of the sensing circuit (30). Inventors: Reddy; Chitranjan N. (Los Altos Hills, CA); Patel; Vipul (San Jose, CA). Assignee: Alliance Semiconductor Corporation (Santa Clara, CA). Appl. No.: 965,431 Filed: Nov. 6, 1997 company.sleuth.com