United States Patent 6,166,938
Wong Dec. 26, 2000
--------------------------------------------------------------------------------
Data encoding for content addressable memories
Abstract
Input partitioning logic is coupled to bit-lines of a content addressable memory (CAM) array having four-transistor (4-T) non-volatile Flash CAM cells. Prior to a program or search operation on the 4-T Flash CAM cells, two input data bits and their complements are applied to the input partitioning logic, which can be two-input NAND, NOR, AND, or OR gates. By selecting the appropriate values for the input bits, individual ones of the memory cells in the 4-T CAM cell can be programmed, or a desired two-bit pattern can be searched. The use of input partitioning logic prior to applying the search and program voltages to the bit-lines of the CAM cell results in substantially less voltage transitions during searches and less required programming current because fewer Flash memory cells are required to be programmed. Consequently, power consumption while operating the CAM array is substantially reduced, and the Flash memory cell endurance is effectively increased. Global masking techniques can be effectively applied to the input partitioning logic. These same techniques can also be used for DRAM-based CAM cells.
--------------------------------------------------------------------------------
Inventors: Wong; Sau-Ching (Hillsborough, CA).
Assignee: SanDisk Corporation (Sunnyvale, CA).
Appl. No.: 315,807
Filed: May 21, 1999
Intl. Cl. : G11C 15/00
Current U.S. Cl.: 365/49; 365/185.08; 365/189.07
Field of Search: 365/49, 185.08, 189.07, 189.08
--------------------------------------------------------------------------------
References Cited | [Referenced By]
--------------------------------------------------------------------------------
U.S. Patent Documents
4,538,243 Aug., 1985 Zehner 365/49
4,833,643 May, 1989 Hori 365/49
4,890,260 Dec., 1989 Chuang et al. 365/49
4,928,260 May, 1990 Chuang et al. 365/49
5,034,919 Jul., 1991 Sasai et al. 365/49
5,040,134 Aug., 1991 Park 364/602
5,051,949 Sept., 1991 Young 365/49
5,111,427 May, 1992 Kobayashi et al. 365/49
5,226,005 Jul., 1993 Lee et al. 365/49
5,258,946 Nov., 1993 Graf 365/49
5,267,213 Nov., 1993 Sung et al. 365/226
5,305,262 Apr., 1994 Yoneda 365/49 X
5,383,146 Jan., 1995 Threewitt 365/49
5,386,379 Jan., 1995 Al-Yahia et al. 365/49
5,396,449 Mar., 1995 Atallah et al. 365/49
5,422,838 Jun., 1995 Lin 365/49
5,453,948 Sept., 1995 Yoneda 365/49
5,455,784 Oct., 1995 Yamada 365/49
5,568,415 Oct., 1996 McLellan et al. 365/49
5,619,446 Apr., 1997 Yoneda et al. 365/49
5,642,114 Jun., 1997 Komoto et al. 365/49 X
5,787,458 Jul., 1998 Miwa 711/108
5,828,593 Oct., 1998 Schultz et al. 365/49
5,859,791 Jan., 1999 Schultz et al. 365/49
5,890,201 Mar., 1999 McLellan et al. 711/108
5,940,852 Aug., 1999 Rangasayee et al. 711/108
5,949,696 Jul., 1999 Threewitt 365/49
Other References
Aragaki et al., "A High Density Multiple-Valued Content-Addressable Memory Based on One Transistor Cell," IEICE Trans. Electron., vol. E76-C, No. 11, Nov. 1993, pp. 1649-1656.
Ghose and Dharmaraj, "Response Pipelined CAM Chips: The First Generation and Beyond," The 7th Int'l Conference on VLSI Design, Jan. 5-8, 1994, pp. 365-368.
Glaise and Munier, "A Low Cost Searching Device for an ATM Adapter," The 6th Int'l Conference on Computer Communications and Networks, Sep. 22-25, 1997, pp. 488-493.
Hanyu et al., "Design of a One-Transistor-Cell Multiple-Valued CAM," IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, pp. 1669-1674.
Hanyu et al., "2-Transistor-Cell 4-Valued Universal-Literal CAM for a Cellular Logic Image Processor," 1997 IEEE Int'l Solid-State Circuits Conference, Digest of Technical Papers, First Edition, Feb. 1997, pp. 46-47 and 427.
Hanyu et al., "One-Transistor-Cell 4-Valued Universal-Literal CAM for Cellular Logic Image Processing," The 27th Int'l Symposium on Multiple-Valued Logic, May 28-30, 1997, pp. 175-180.
Hanyu et al., "Multiple-Valued Floating-Gate-MOS Pass Logic and Its Application to Logic-in-Memory VLSI," The 28th Int'l Symposium on Multiple-Valued Logic, May 27-29, 1998, pp. 270-275.
Jamil, "RAM versus CAM," IEEE Potentials, vol. 16, No. 2, Apr./May 1997, pp. 26-29.
Kramer et al., "55GCPS CAM Using 5b Analog Flash," 1997 IEEE Int'l Solid-State Circuits Conference, Digest of Technical Papers, First Edition, Feb. 1997, pp.44-45 and 427.
Miwa et al., "A 1Mb 2-Transistor/bit Non-Volatile CAM Based on Flash-Memory Technologies," 1996 IEEE Int'l Solid-State Circuits Conference, Digest of Technical Papers, First Edition, Feb. 1996, pp. 40-41 and 414.
Miwa et al., "A 1-Mb 2-Tr/b Nonvolatile CAM Based on Flash Memory Technologies," IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, pp. 1601-1609.
Schultz and Gulak, "CAM-Based Single-Chip Shared Buffer ATM Switch," IEEE Int'l Conference on Communications, May 1-5, 1994, pp. 1190-1195.
Schultz and Gulak, "Fully-Parallel Multi-Megabit Integrated CAM/RAM Design," IEEE Int'l Workshop on Memory Technology, Design and Testing, Aug. 8-9, 1994, pp. 46-51.
Schultz and Gulak, "Fully Parallel Integrated CAM/RAM Using Preclassification to Enable Large Capacities," IEEE Journal of Solid-State Circuits, vol. 31, No. 5, May 1996, pp. 689-699.
Shafai et al., "Fully Parallel 30-MHz, 2.5-Mb CAM," IEEE Journal of Solid-State Circuits, vol. 33, No. 11, Nov. 1998 pp. 1690-1696.
Wade and Sodini, "A Ternary Content Addressable Search Engine," IEEE Journal of Solid-State Circuits, vol. 24, No. 4, Aug. 1989, pp. 1003-1013.
Yamagata et al., "A 288-kb Fully Parallel Content Addressable Memory Using a Stacked-Capacitor Cell Structure," IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1927-1933.
Yamagata et al., "A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories," IEICE Trans. Electron., vol. E76-C, No. 11, Nov. 1993, pp. 1657-1664.
Primary Examiner: Hoang; Huan
Attorney, Agent or Firm: Majestic, Parsons, Siebert & Hsue
37 Claims, 16 Drawing Figures
-------------------------------------------------------------------------------- |
