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To: wily who wrote (124832)1/13/2001 12:04:17 AM
From: Scumbria  Read Replies (4) | Respond to of 186894
 
Wily,

One of the main problems with P4 is the small single ported L1 cache. This is not the result of a lack of transistors, but rather the decision made to access the cache in two cycles. Athlon uses a large three cycle dual-ported L1 cache, which I believe is far more sensible. I suspect that P4 is permanently crippled because of this decision.

Scumbria