SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?


To: Joe NYC who wrote (126044)1/26/2001 12:18:54 AM
From: Elmer  Respond to of 186894
 
Re: "They had to wait to P7 generation chipset to get to sorry state of no SMP that AMD is in. If you were a betting man, who would you bet on as far as being first to deliver SMP for the 7th generation processors?"

First off, I disagree with those who claim Athlon is a 7th generation processor, but perhaps that's another argument. I suspect, but do not know, that P4 chipsets are currently SMP capable but disabled, waiting for Foster. The P4 bus seems to be an evolution of the PPro,P2,P3 bus where SMP was a pure no-brainer. In fact, Intel has real trouble disabling it on the processors, allowing Celerons to be used in SMP systems, much to Intel's displeasure. SMP can be disabled on the chipset by strapping some of the pins which arbitrate for the bus. This is why I post that Intel has never shipped a P6 generation chipset DIE that wasn't SMP capable, however some of the packaged parts don't support it.

EP