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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: maui_dude who wrote (126386)	1/31/2001 8:01:52 PM
From: Dan3	Respond to of 186894

Re: The difference with the RDRAM is compelling... If this isn't just Rambus BS, it's horrible news for Intel. Athlons don't show much improvement going from PC100 to PC133 to DDR200 to DDR266. The processor extracts a great deal of performance from limited memory, and the scheduled speed increase later in the year to 166/333 for DDR (tripling PC100 speed) should easily support Athlons up to 3GHZ. RAM isn't going to be a bottleneck for the K7 core for a long time. But if P4 shows a dramatic decrease in performance going from RDRAM to SDRAM, then it means that the RAM needs of current P4s are already well beyond PC133. This is possible, since P4 uses a shotgun approach to memory access to compensate for its long pipeline. Whenever P4 needs a word, it fetches several words, hoping to get the next one needed to reduce the chances of stalling that long pipeline. The result is that P4 uses several times as much bandwidth as the program needs. One other test was reported that tried to run P4 with single chanel RDRAM - and it did hurt the performance of P4 quite a bit, but since that wasn't an optimized P4 configuration, the big performance hit could have been for other reasons. But bad performance from an optimized, Intel configured, SDRAM system may mean that even dual channel RDRAM will dramatically limit P4 performance to not much more than what is delivered by a 1.5GHZ or 2GHZ P4 system. It would indicate that most of the headroom gained from the expensive dual channel motherboards used in existing P4 configurations has already been used up - and where can Intel go from here? Athlon/PIII 1GHZ performance on single channel PC100 isn't too far behind 1.5GHZ P4 performance on dual channel PC800. Athlon is moving to DDR333, more than tripling memory speed for future, higher speed Athlon cores - RAM won't be holding those back. If Intel has to cut back on prefetching to avoid overwhelming the memory bus on future P4 chips, how much more time will the chip spend waiting to refill its stalled pipeline? Most likely, though, it's just Rambus BS and phoney benchmarks. Dan