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To: TechieGuy-alt who wrote (27031)1/31/2001 7:21:52 PM
From: jcholewaRead Replies (3) | Respond to of 275872
 
> Well, the meat of the article was that a single 266 DDR 1.2GHz Athlon compiled the kernel in 4min 51secs
> and the dual system compiled it in 2 min 00 secs!, more than a 100% performance improvement.
> (Normally one expects somewhat < 100% performance improvement).

I should point out that the fact that the total cache of the system is now 768KB instead of 384KB could easily account for a greater than linear performance increase.

Nonetheless ... does anybody know how much a PIII increases in performance from 1-way to 2-way? Any links?

&nbsp;&nbsp;&nbsp;&nbsp;-JC



To: TechieGuy-alt who wrote (27031)2/1/2001 4:41:02 AM
From: Neil BoothRespond to of 275872
 
This shows that the point to point architecture is alleviating some bottlenecks in the front side bus. Impressive, as the compilation is a VERY memory (and integer) intensive operation.

Not to mention, it really stresses the system, as we saw with Intel's 1.13 PeeWeeThree <g>.

It's a good sign for the stability of the dual chipset and processors, and it's cool that Linux could boot it. My O/S of choice.

Neil.


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