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To: fyodor_ who wrote (27390)	2/4/2001 3:13:04 PM
From: jjayxxxx	Read Replies (1) \| Respond to of 275872

*RE: <jj: If he made it after 11/9/00, I think it is more likely that he was merely referring to new processor speed introductions.>* fyo: I don't remember when he made the claim. I'd say around November, though... From the context at the time, I think it's highly unlikely that he was referring to speed grades. Yes, I'd agree. That is why I am thinking he made it prior to 11/9. If so, Hector was wrong, END OF STORY (as of almost 3 months ago!). But if he made it after 11/9/00, then anything other than new speed intro's would be in stark contrast with the roadmap and he'd either be a really dumb liar or just off in his own world, or both. No matter how you slice it, Hector loses. <g> Btw, if you don't accept Mobile Duron as a "new" CPU, neither is Mobile Palo ;) I guess I don't accept it as something Hector would have dreamt up when making his 5-new-processors claim because it is obviously a stopgap of some sort. It isn't even included on their roadmap, which shows the K6-2+/III+ living up until Mobile Morgan w/ PowerNow!: Page 73: amd.com Yes, I saw your wink. Still felt like responding. Notwithstanding this whole Hector promise and the stopgap issue, I still think it is arguable that the current mobile Duron is not really a 'new processor'. Yes, it might technically be a 'new processor', but you won't catch me defending it. JJ

To: fyodor_ who wrote (27390)	2/4/2001 3:29:05 PM
From: jjayxxxx	Respond to of 275872

RE: 5 new processors In August, AMD President Hector Ruiz said that AMD would introduce five new processors between Nov. 15 and Feb. 15, including Mustang, with on-chip caches up to 2 Mbytes; Palomino, which was originally slated to include 256 Kbytes of on-chip cache; and Morgan, which was slated to include a 64-Kbyte cache. from Message 14794317 Therefore, I reiterate, since the 11/9/00 roadmap clearly changed Hector's "five new processors" schedule: END OF STORY JJ P.S. For completeness, convenience, and incredible redundancy, 11/9/00 roadmap is on page 73: amd.com