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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Mihaela who wrote (66867)	3/1/2001 7:46:36 PM
From: pompsander	Respond to of 93625

That was the best, clearest description of the Foster I have ever read, comrade. No wait, its just Greek to me....I think.

To: Mihaela who wrote (66867)	3/1/2001 8:20:58 PM
From: Mihaela	Read Replies (1) \| Respond to of 93625

eetimes.com ServerWorks chip set beats Intel to the DDR punch By Anthony Cataldo EE Times (03/01/01, 6:05 p.m. EST) SAN JOSE, Calif. — ServerWorks Inc. is looking to steal some limelight from Intel Corp. by rolling out its first chip set for the Pentium 4 processor later this year. The ServerWorks chip set leans heavily on double-data-rate DRAMs to feed the wide Pentium 4 front-side bus and includes several features designed to protect the system against faulty memory bits. Designed for two- or four-way Xeon-based systems, the chip set is set to go into volume production starting in the third quarter. That should put ServerWorks a step ahead of Intel's chip set group, which won't have its DDR-based chip set for servers ready until early 2002. While Intel is looking to deploy RDRAM on its various platforms "top to bottom," DDR will have a place in servers since those platforms are not constrained by the higher pin counts of that high-speed successor to SDRAM, said Intel Fellow Pete MacWilliams, who oversees Intel's Memory Enabling Group. But MacWilliams said the company is taking precautions to ensure that it doesn't run into problems after it has defined its DDR platform the way it did with its first RDRAM implementation. Intel is preparing an addendum to the Jedec DDR spec so that DRAM makers will adhere to Intel's own requirements, he said. "Intel is not trying to create another version of DDR; we only want to make sure that the one that's out there can be made to work on a robust platform," MacWilliams said. ServerWorks doesn't take system reliability for granted either, said David Pulling, executive vice president of marketing and sales for the Santa Clara, Calif., company, which was acquired by Broadcom Corp. in January. , ServerWorks usually works with a customer for six months before finalizing a platform, he said. "System validation is probably the single biggest investment we've made as a company," Pulling said. ServerWorks' Grand Champion chip set uses DDR-200 devices to deliver up to 6.4 Gbytes/second of memory bandwidth, four times faster than the company's previous-generation chip set, based on PC133 SDRAMs. The design accommodates up to 16 registered PC1600 dual-in-line memory modules (DIMMs) with capacities of 128 Mbytes to 2 Gbytes, for a maximum 32 Gbytes of system memory. As server memory capacities rise, so do the chances of encountering faulty bits or a bad memory, said Pulling. To address those reliability concerns, the chip set was designed to support hot-plug memory, to allow memory upgrades during operation; a memory mirror option, which enables data to be written to a redundant memory subsystem; chip kill; and a 128-bit ECC algorithm licensed from IBM that corrects quad-bit errors and detects 8-bit errors. On the I/O side, ServerWorks designed in dual-channel support for the 64-bit/100-MHz PCI-X bus. Each PCI-X controller runs in full-duplex mode, transferring data in 2-byte intervals through a bidirectional point-to-point connection with the system I/O north bridge controller. "There's no need for bus arbitration, and you're only two clocks away from main memory," Pulling said.