SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: fyodor_ who wrote (33428)3/25/2001 8:19:57 PM
From: ScumbriaRead Replies (1) | Respond to of 275872
 
Fyo,

wouldn't you agree that the P4 will see significant improvement from the extra cache?

Not really. It will help some, but the small single-ported L1 cache is a fatal error. Because of the 2-cycle cache access, they can't fix the L1 without a complete rework of the pipeline.

Scumbria



To: fyodor_ who wrote (33428)3/25/2001 9:44:16 PM
From: dale_laroyRespond to of 275872
 
I have to agree. By the time Palomino is out, Intel will have moved on to Northwood. Even with Thoroughbred, AMD will have to use nine layers of interconnect to reach 2.4 GHz @ 0.13-micron, while Northwood should be able to hit 2.7 GHz with ease, possibly ramping to significantly more than 3.0 GHz.

On the other hand, the Hammer series has to be causing Intel management many sleepless nights. No doubt, x86-64 will be next to useless in Hammer. OTOH, the enhanced SSE-2 capabilities and greater ability to ramp clock rate pose real threats to Northwood.