Toshiba Semiconductor President Talks about 'Cell' Project
March 29, 2001 (TOKYO) -- Yasuo Morimoto, president of Toshiba Semiconductor Company, talked recently about the "Cell" project for the broadband era.
President of Toshiba Semiconductor
The Cell project started with two other companies -- Sony Computer Entertainment Inc. and IBM Corp. The three companies announced plans on March 12 to research and develop an advanced chip architecture for devices in the broadband era.
The companies will collectively invest more than US$400 million in the next five years to design a "supercomputer-on-a-chip" they call "Cell."
"'Cell' microprocessor chips will have heat, packages with many pins, and large chip sizes. We find ourselves competent in contributing to coping with those issues through our packaging technology, and volume production ability with the cheapest manufacturing cost," said Morimoto.
As the background of Toshiba's participation in the joint research and development project of the new microprocessor core, Morimoto explained, "In order to expand the system LSI business, it's essential to have our original and dominantly competitive microprocessor cores. And, its impossible to develop such a powerful core chip through one company." But, "Toshiba by no means intends to abandon its MIPS architecture. Toshiba intends to put the core 'Cell' into its one of several microprocessor architectures in 2005, and therefore, does not intend to fully depend only on Cell," Morimoto emphasized.
The investment for Cell's R&D will be nearly US$400 million over the next five years, and will be equally provided by the three companies, SCEI, IBM and Toshiba. Toshiba will provide nearly 3 billion yen (123.03 yen = US$1) every year. For Toshiba, it's less than one fiftieth of its total semiconductor investment of nearly 170 billion yen. "This couldn't be any better for us, considering that we can expect getting the most powerful microprocessor core through a limited investment like this," said Morimoto.
'Cell' Has a Building-Block Structure
Morimoto explained the abstract concepts of the Cell, although the details of it remain undisclosed.
He said the Cell chip is composed of a building-block structure in which the I/O portions are standardized for all applications, from mobile phones to large-scale servers. And the signal processing portion is composed of a scalable structure, in which the level of functions and characteristics are selectively switched. Therefore, the core chip itself will be designed to have the top-level operation of delivering more than one teraflops of processing power. For devices using the core's full capacity, the core chip is used with its full capacity, and for devices having no need for its full capacity, several portions of the core chip will be selectively used.
Toshiba, SCEI, and IBM will develop the peripheral LSIs, he added. It looks like the memories for the Cell architecture are being developed by the group companies. As for the operating system for the new microprocessor core, "Currently, we can't comment on that, but it will be an operating system that enables the Cells being connected to each other to operate in parallel," said Morimoto. There are many people anticipating that not only the hardware, but the operating system for the new Cell microprocessor core also will be developed in parallel.
Cell Chip to be Manufactured in 300mm Wafer Facilities
This Cell project may help build up investor interest in Toshiba for the manufacture of LSIs. Morimoto hinted that Toshiba will be likely to advance the introduction of 300mm wafers from original plans. Many semiconductor makers haven't ironed out when exactly to introduce them in their facilities.
"As the Cell chip size will be fairly large, the Cell chips are most suitable for being manufactured at the 300mm wafer facilities. In 2005, Toshiba may have two 300mm wafer manufacturing lines, one for memories including NAND type flash EEPROMs, and the other for logic LSIs including Cell," said Morimoto.
As for the semiconductor process technologies for 0.1-micron processing era to manufacture the Cell chips, the three companies are less in agreement. SCEI has announced a license for IBM's 0.1-micron process technology, "CMOS 10S," which includes copper wiring, low-K dielectric insulation material and silicon-on-insulator technologies.
On the other hand, "Toshiba has no plan to be licensed with IBM's process technologies," said Morimoto. "For those companies, it is not necessary to have the same process, but it's an essential condition for us to standardize the basic electric characteristics. Toshiba already has its own copper wiring, low-K dielectric material and SOI technologies, therefore we think we can go ourselves, not relying on IBM's process technologies," Morimoto said.
(Motoyuki Oishi, Staff Editor, Nikkei Electronics) |
