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Politics : Formerly About Applied Materials -- Ignore unavailable to you. Want to Upgrade?

To: Ian@SI who wrote (45551)	4/18/2001 4:44:17 PM
From: Proud_Infidel	Read Replies (1) \| Respond to of 70976

TSMC targets 0.10-micron for production in Q3 2002, moves 300-mm to 0.13-micron Semiconductor Business News (04/18/01 09:39 a.m. EST) HSINCHU, Taiwan--Silicon foundry giant Taiwan Semiconductor Manufacturing Co. Ltd. here today announced it has completed development of its basic modules for 0.10-micron CMOS logic processes. The company said it now plans to work with leading-edge customers to push the technology into production by the third quarter of 2002. Also today, TSMC said it has now achieved "reasonably good yields" in 300-mm pilot production of 0.13-micron 4-megabit SRAM test chips, which have all copper interconnects. After the successful pilot run in early April, TSMC plans to test "a few customer designs" in the 0.13-micron copper process on 300-mm diameter wafers this month. "The 300-mm technology will be the new workhorse technology," said N.S. Tsai, senior director of TSMC's 300-mm (12-inch) wafer processing project. In December, TSMC announced it had produced the first customer chip designs on 300-mm wafers using a mature 0.18-micron process technology, which was used to bring up the company's first pilot line in Tainan (see Dec. 18 story). TSMC is now constructing two dedicated 300-mm production facilities--Fab12 in Hsinchu and Fab14 in Tainan. Fab12 is expected to enter "risk" (or early prototype) production in the fourth quarter of 2001 while Fab14 cleanroom construction will be finished at the end of 2001, said TSMC. Meanwhile, TSMC is pushing hard to put its 0.10-micron process into production in a timeframe that's similar to other major semiconductor manufacturers--such as Intel, IBM, and Texas Instruments. TSMC said it is the first foundry company to complete development of the 0.10-micron (100-nm) technology modules. TSMC said it has launched a global initiative to attract first-tier technology customers to the new technology, with a target to begin production in Q3 next year. The initiative is aimed at adding special features to TSMC's basic process modules for applications and system-on-chip designs. "Through this basic set of process modules, we have defined a framework for our 0.10-micron process technology," said S.Y. Chiang, senior vice president of research and development for TSMC. "It's rather like starting a state-of-the-art modular office building, knowing it will be occupied by tenants with a variety of needs. We have a schedule and a basic architecture -- the design rules. The arrangement of the 'offices,' or process modules, is a collaborative effort with our advanced technology partners, to ensure that the final building encompasses the needs of all of these 'occupants,'" he said in the analogy. Ultimately, TSMC said it plans to deliver "the industry's most robust 0.10-micron process technology," including high-performance, low-power, mixed-signal/RF, and embedded memory options, said Chiang. Because 0.10-micron technology handles a much higher level of integration than previous process generations, TSMC said its foundry customers need additional assurance that a variety of building blocks--such as intellectual property (IP) cores and design libraries--are available for the next-generation foundry technology. As part of the 0.10-micron initiative, TSMC said it is working with major electronic design automation suppliers and design library companies to ensure that the new process and application-focused derivatives will available to support more complex system-on-chip (SoC) products.