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To: Jim Oravetz who wrote (937)	5/1/2001 11:46:13 AM
From: Jim Oravetz	Read Replies (1) \| Respond to of 1056

Backend assembly/test tries to dig out of big hole Heard on the Beat By Semiconductor Business News Apr 28, 2001 (7:14 AM) URL: siliconstrategies.com While wafer fabs worldwide are running at nearly three-fourths their installed capacity--according to some estimates--final chip-assembly and testing plants are in much worse shape because Asian contract manufacturers overspent in the boom times of 1999 and 2000. These assembly houses were aiming to grab more market share as packaging and testing requirements changed in system-on-chip designs. Even though backend assembly houses have slammed the brakes on spending since mid-2000, chip-packaging capacity utilization is now running at about 69% on average worldwide, according to a new estimates at VLSI Research Inc.. That's down from more than 80% at the start of the year. Test capacity utilization is not much better at 71% of installed capacity, according to San Jose-based market research firm. Test and packaging plant utilization rates are expected to be back up around 80% or greater before the end of the year, but still below last year's levels until later in 2002. Recent book-to-bill statistics show worldwide test suppliers at 0.80 in February and backend assembly gear at 0.78, according to the Semiconductor Equipment and Materials International (SEMI) group. At the Semicon Europa conference in Munich this week, SEMI analysts said those figures are likely to drop further in March when those numbers come out in mid-May. --J.R.L.