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To: Bilow who wrote (72080)	5/7/2001 8:59:27 PM
From: gnuman	Respond to of 93625

Carl re: The last RDRAM is not on the end of the bus. The bus starts with a controller I/O pin on one end, and ends with a termination resistor at the other end. The RDRAM chips are all in the middle. As I stated before, the RDRAM chips all see Z/2, while the controller, being on one end of the bus, sees Z. (Forgot to get back to you on this one). <g> What I said was, "The last chip on the bus certainly can't be characterized as being in the "middle of the bus."" You're obviously talking about an active strip/micro-strip transmission line. (The RDRAM chips all see Z/2). Since the devices are distributed along the length of the bus, they all can't be in the middle. IMO, not even a semantics issue.

To: Bilow who wrote (72080)	5/8/2001 12:03:07 AM
From: gnuman	Read Replies (2) \| Respond to of 93625

Carl, re: By this I simply meant that the RDRAM outputs have to drive signals into a bus that does not start with any particular voltage. This simply implies that the RDRAM current sources must have a wide output compliance. (I'm still responding). <g> I don't get it. What's the relationship between voltage levels on the bus and a current source? And why do they need wide output compliance? Look's to me like a current source is an excellent technical solution, but I'm interested in your reasoning. TIA