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To: that_crazy_doug who wrote (39041)5/11/2001 11:42:00 AM
From: dale_laroyRespond to of 275872
 
>Sure if we have it, then it should be announced, and the fact that it hasn't been anounced is pretty strong evidence that it hasn't happened.<

Hasn't anybody on this thread heard of the Osborne effect. It is quite possible that a significant chunk of the current PC market slowdown is due to such an effect.

If AMD were to announce that Palomino supports SSE, that would be one more reason for potential consumers to wait for the desktop Palomino.



To: that_crazy_doug who wrote (39041)5/11/2001 2:37:42 PM
From: Joe NYCRespond to of 275872
 
Doug,

Sure if we have it, then it should be announced, and the fact that it hasn't been anounced is pretty strong evidence that it hasn't happened.

That's true. Otherwise, a lot of people are setting themselves up to be disappointed.

As far as inclusive cache, it would be kind of useless for Duron / Morgan. It would basically perform not much better than L2-less K7. L2 less K7 is something AMD should have done long long time ago, actually along with introduction of regular Athlon in 1999.

I wonder if there is going to be some differentiation between these chips in how L2 is configured. Duron with tiny cache benefits from exclusive L2, once you get to 512K or more, incluive cache makse sense (assuming that inclusive cache performs better).

Joe