SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?


To: Dave B who wrote (73958)5/31/2001 11:29:04 AM
From: Sun Tzu  Read Replies (1) | Respond to of 93625
 
Dave thanks for the explanation. As you say, given all the delays that hit Merced, they should have had plenty of time to move on to RDRAM. I never had to do a memory design so perhaps my question is trivial. Are you saying that now Intel cannot have RDRAM go with Itanium? Is the change not as simple as replacing the 460GX chip set with something that supports RDRAM? How is McKinley different in its support for RDRAM and does it support DDR as well?

Sorry to ask so many questions, its just that I've been thinking that RDRAM should have a better chance in the server market than in desktop.

thanks,
ST



To: Dave B who wrote (73958)5/31/2001 12:20:52 PM
From: Ali Chen  Read Replies (2) | Respond to of 93625
 
"..the Itanium was initiated long before Intel selected RDRAM"

What a convenient explanation for you!
(Given that Intel has had first grip on the
whole Rambus design and implementation since 1991)

"By the time RDRAM showed up, the Itanium (Merced) was behind schedule"...
which would give more time for chipset designers
to built a Rambus controller, wouldn't it? Unless there
are some serious considerations against Rambus in
server products...

I think the consideration is/was very simple: Rambus
today cannot hold more than 1GB of RAM per channel,
since only 2 RIMMs can work more or less reliably
on a channel. Even with 8 channels it will give you
only 8GB of RAM, which is NONE for todays server
or workstation standards, while the apparent strategic
cometitive target was to support up to 64GB.
More, it is impossible to fit 8 Rambus channels
around one memory controller unless the board is
12 layers (current i850GX P-4 boards are 6-layer,
and the Rambus tracing occupies about 1/3 of the
chip perimeter).

Even if you double the DRAM chip density (Carl: when it
will happen?), the Rambus approach would be still
4-8x short of strategic targets for RAM capacity.

- Ali



To: Dave B who wrote (73958)5/31/2001 2:12:48 PM
From: Bilow  Respond to of 93625
 
Hi Dave B; Re: "To summarize, the Itanium was initiated long before Intel selected RDRAM ..." and "The fact that McKinley is moving to RDRAM should tell you more."

A more accurate statement on McKinley is that it "moved to RDRAM", not that it is "moving to RDRAM". All that the fact that McKinley is to be connected up to RDRAM tells you is that their design was started at a time when Intel thought that RDRAM would be the next mainstream memory. This is something that Intel has (privately) given up on. All their new chipset starts since at least a year ago have been in support of DDR or SDRAM. None have been in support of RDRAM. They have already dumped RDRAM for new designs. This will allow them to dump RDRAM for production by a year or so from now.

The basic fact is that Itanium began as an SDRAM design, and is still not supported by any RDRAM chipsets. McKinley began as an RDRAM design, but is now supported by DDR chipsets. This should clue you in as to how Intel (and the industry) is thinking.

-- Carl