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To: Jdaasoc who wrote (138717)7/6/2001 10:11:42 AM
From: Scumbria  Read Replies (1) | Respond to of 186894
 
John,

The only problem is sustained DDR bandwidth is only about 40% of theoretical 2.1 GBit/sec. So your logic dictates that DDR computers will need 2+ DDR memory channels on the chipset just to drive the video subsection optimally.

The 40% number is not accurate. Long streams of data from contiguous addresses (typical of video) run at near 100% efficiency.


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