Re: " Re: "Why isn't Intel producing any Northwoods? Any McKinleys? any 300mm wafers? "
Intel IS producing 300 MM wafers.
Intel claims first blood in 300-mm wafer shift
By David Lammers, EE Times
Apr 6, 2001 (12:28 PM)
URL: eetimes.com
AUSTIN, Texas — Intel Corp. has fabricated its initial ICs with 130-nanometer (0.13-micron) design rules on 300-mm wafers at its D1C development fab, the company said this week. Intel claims to be the first in the industry to combine the advanced process on the larger wafers. Analysts said Intel's plans to ramp three 300-mm (12-inch) fabs next year will increase the competitive pressure on rival Advanced Micro Devices Inc. (AMD). How chip makers manage the dual transition to a 130-nm process on 300-mm wafers promises to be a major test of budgets and manufacturing competence.
The move to a 130-nm process on 300-mm wafers will give Intel a 30 percent cost advantage starting next year, said Tom Garrett, Intel's 300-mm program manager and the person in charge of the D1C fab in Hillsboro, Ore.
Success depends on a smooth transition to the more complex wafer-handling systems and factory automation software. Garrett said the switch to a completely new equipment set, and the introduction of sophisticated intrabay and interbay automation, are the two largest challenges facing Intel.
The D1C facility is larger than many volume fabs, with 135,000 square feet of clean-room space. Intel will bring up its 130-nm process in the middle of this year at 200-mm fabs, with the shrink version of the Pentium 4 as the driver, said process manager Mark Bohr.
Intel's $7.5 billion budget for capital expenditures is being put to work at three locations. Volume 300-mm production turns on in earnest early next year with the opening of dedicated 300-mm fabs in Rio Rancho, near Albuquerque, N.M. (Fab 11X); the Ocotillo facility outside of Chandler, Ariz. (Fab 22); and the oft-postponed Ireland facility (Fab 24).
Surprisingly, Intel estimated the cost of a fully equipped 300-mm wafer fab at about $1.5 billion, against $1.2 billion for a similar-size 200-mm wafer fab.
"Factory to factory, the larger wafers provide about 1.6 to two times higher output for the same die, and a 30 percent cost advantage," Garrett said, noting that Intel can build fewer factories and get more output from its fab construction resources.
"All the next-generation tools are developed for 300-mm wafers, and that platform is where all of the innovation is happening. The footprint of the machines is not that much larger than the earlier-generation equipment. Overall, 200-mm factories will become increasingly inefficient," he added.
The 300-mm fabs will be the workhorse production facilities for Intel's 130-nm copper process, with six layers of interconnect, a 70-nm gate length and a 1.5-nm gate oxide thickness.
For its part, AMD recently announced it will begin 300-mm wafer production in 2004, with partners being sought to share the cost. But that schedule may be pulled in somewhat, particularly if AMD chooses to equip an existing shell at its Dresden, Germany, facility, said analyst Dan Hutcheson, president of VLSI Research Corp. And AMD would benefit by following Intel in that it could buy off-the-shelf, fully debugged equipment.
Nathan Brookwood, principal analyst at Insight64, said Intel needs the larger wafers to handle the large die size of the Pentium 4, which measures 230 square millimeters when manufactured in a 180-nm process. The designers of the 42 million-transistor P4 clearly had a 130-nm process in mind, Brookwood said. He predicted Intel will have a six-month lead over AMD in bringing up its 130-nm process, rolling it out in the second half of the year, against early 2002 for AMD. Intel will use a mobile P4, the Tualatin, to ramp its 130-nm process starting in July, while AMD will bring up 130-nm technology with the Clawhammer MPU that ships early in 2002.
But Intel is much further ahead in the transition to 300-mm wafers. Brookwood said the 30 percent cost advantage is not as important as it might first appear. A Pentium III Xeon processor used in servers might sell for $600 and cost $55 to $75 to manufacture. Cutting the manufacturing costs to $50 won't have that great an impact, he said. For Celerons and other low-end products, the competitive edge is more pronounced.
Fast transition
Hutcheson said the transition to 300-mm fabs "is coming on really fast. In the 1998 downturn, the first thing companies did was cancel their 300-mm programs. One big reason then was that the factory control systems were not ready, but PRI, Brooks Automation and others have factory control systems ready."
The big problem at the moment, he said, "the control systems for the 300-mm equipment are based on PCs, and you know how reliable Windows can be. In that regard, we are hearing about 30 to 40 percent downtimes for some equipment."
VLSI Research is ratcheting down its estimates for front-end wafer fab equipment, as companies cancel orders for 200-mm equipment needed to expand capacity in existing fabs.
"We thought the crossover from 200-mm equipment to 300-mm equipment would come in 2002 or 2003, but we now think [it] will come this year as the wafer guys stick with their plans for 300-mm fabs" and cancel most 200-mm expansions, Hutcheson said.
He cautioned that wafer suppliers may not be ready for the demand coming from leading-edge companies such as Intel, TSMC, UMC, Elpida, Samsung and Infineon. "The big issue is whether the wafer suppliers are ready," Hutcheson said.
The current downturn in the chip market may give silicon vendors breathing room to put 300-mm wafer production facilities in place, said Dean Freeman, principal equipment analyst at Gartner Dataquest. Chip makers must convince the wafer producers that profits will come from those investments. Currently, a 300-mm wafer is priced at about $400 to $500, he said.
"We decided to cap all of our 8-inch capacity expansion and devote the entire budget to 12-inch," said Jim Ballingall, vice president of marketing at UMC Corp. Though the Taiwanese fab will reduce its capital expenditures from $2.8 billion last year to about $1.5 billion in 2001, "We are still expanding our overall capacity by 30 percent this year by spending a lot of money exclusively on 12-inch fabs," Ballingall said.
Taiwan Semiconductor Manufacturing Co. is also cutting its capital expenditure budget but keeping 300-mm production a priority, said spokesman Chuck Byers. "We cut our capex from $3.8 billion to $2.7 billion, but a substantial portion of that money is being spent on 300-mm facilities," Byers said.
As Intel and AMD duke it out in microprocessors — a market where die sizes often exceed 200 mm2 — DRAM vendors produce smaller dice and may be less enthusiastic about moving to 300-mm wafer fabs, Freeman said.
Samsung is building a 300-mm fab in Kihung, South Korea; Elpida, the NEC-Hitachi DRAM venture, has a 300-mm fab under construction in Hiroshima, Japan; and Infineon has several 300-mm fabs dotting its road map. However, Freeman said major DRAM vendors "are building 300-mm fabs to get some learning going, but the significant cost benefits are with the larger dice, which means 1-Gbit and 4-Gbit DRAMs."
Hutcheson of VLSI Research said the timing of a wafer transition can be critical in the DRAM business. Japanese companies, which held three-quarters of the DRAM market at the beginning of the '90s, were reluctant to put in 8-inch equipment, he said, sticking with 6-inch wafers longer than prudent. South Korean manufacturers invested heavily in 8-inch capacity in 1993-95, and gained significant competitive advantage from the larger wafers.
Taiwan's two largest foundries as well as chip makers elsewhere in Asia are attempting to gain a similar edge with the 300-mm transition. UMC and Hitachi Ltd. are already in production on 300-mm wafers at their joint venture in Japan, aptly named Trecenti, Latin for "300." UMC's 300-mm wafer fab in Tainan, Taiwan, is to start production in July, and a groundbreaking ceremony is scheduled for this week in Singapore for a 300-mm UMC fab there.
UMC has another weapon: It recently announced it is in early production with the 130-nm logic process co-developed with IBM and Infineon. "We have several customers that are prototyping products based on the 130-nm process that will be in full production in the second half of this year," Ballingal said.
Ramping up at TSMC
TSMC is now processing about 6,000 of the 300-mm wafers per month at its newest fab in Tainan, which includes a 300-mm clean room inside a larger 200-mm facility. Its first dedicated 300-mm facility, Fab 12 in Hsinchu, expects to begin wafer starts in December. Fab 14, in Tainan, is in the first phase of construction.
TSMC also is bringing up its early 300-mm fabs with a 180-nm process, using a 200-mm facility for the 130-nm process that has been in production since December 2000 (see related story).
Intel's capital budget for this year is only 13 percent less than the planned spending by all of Taiwan's IC makers, noted Bill McClean, president of IC Insights, and more than twice what Intel spent in 1999.
"This is a strategically aggressive move that will pay enormous dividends for the company," McClean said. "In the history of the IC industry, the vast majority of companies that spent aggressively through the downturn have always gained market share during the following upturn."
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