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To: wanna_bmw who wrote (50764)8/11/2001 9:13:54 PM
From: Bill JacksonRespond to of 275872
 
wanna, Intel was frightened into the premature release of the 'botched' gates before the method was mature due to the arrival of the Athlon.
Enormour numbers of bad chips had to be scrapped, Intel ate them all, non the less is disquieted all those users why were using Intel only. Thay started to try alternate sources and many found they liked them.
Germany has an excellent technical reputation and the fact that Athlons came from AMD in Germany has no doubt grabbed quite a bit of share there.

Bill



To: wanna_bmw who wrote (50764)8/12/2001 5:02:46 AM
From: pgerassiRead Replies (2) | Respond to of 275872
 
Dear Wanna_bmw:

At this rate the only BMW you can afford is one being sold for scrap. All Intel Rambus chipsets can use one or more MTH which converts Rambus signaling to SDRAM signaling (it makes SDRAM look like RDRAM) and thus it was available for all RIMM connected chipsets. The problem is that these did not do a very good job and added unwanted latency to boot. They also had an occaisional error pop up every now and then. Not very good for error free operations. Learn about a technology before making foolish statements. I840 just requires two of them (I suppose that a MTH could be placed on a RIMM and have two SDRAM slots like slot multipliers (put two DIMMs into a SDRAM slot with an increase of 1 clock of latency for buffering), but everyone disliked RDRAM and didn't trust the MTHs).

AMD does not use notched gates and Intel stopped using them when control problems caused speed distributions to be wide (very few high speed parts, but lots of lower speed parts). When they could do it without them, they stopped using them. It worked great in the lab, but had control problems in production.

Before we had FDIV as an example of an Intel mess up. Now we have the whole RDRAM fiasco front to back. P3-1.13G and 900MHz large cache Xeons are more CPU slips and failures to go along with the failures of 80186, i860, i960, x432, and the original 300MHz L2 cacheless Celeron. And that's just the more memorable ones. We will have more in the future from Intel (every company has their mess ups). And we can add the prominent schedule slips as well (all companies pushing the leading edge has them).

Pete