To: Gottfried who wrote (51108 ) 8/24/2001 2:14:20 PM From: Proud_Infidel Read Replies (1) | Respond to of 70976 Suddenly, cutting-edge fab capacity surpasses other IC processes New report underscores dramatic shift to new technologies during severe downturn By J. Robert Lineback Semiconductor Business News (08/24/01 09:32 a.m. EST) SAN JOSE -- While IC wafer fab utilization rates fell to an all-time low of 72.7% in the second quarter, chip plants producing 0.25-micron MOS integrated circuits took the biggest hit in Q2, according to this week's Semiconductor International Capacity Statistics (SICAS) report. One surprise in the report was that the industry's installed IC capacity for leading-edge technologies--processes below 0.2 micron--had surpassed all other categories in Q2, underscoring the a major shift to next-generation integrated circuits. Overall, industry IC fab utilization plunged to 72.7% in Q2 from 83.8% in Q1, while installed capacity grew 3.6%, said the report, which was issued in the U.S. by the Semiconductor Industry Association here (see Aug. 22 story). The new capacity report shows fab utilization for 0.3-to-0.2 micron process technologies falling from an anemic 87.1% in the first quarter of 2001 to a woeful 69.7% in Q2. Moreover, the chip industry's installed capacity for 0.3-to-0.2 micron processes dropped nearly 16% in the April-June quarter compared to the first three months of this year. All other technology segments, except for the most mature MOS processes, continued to see an increase in installed capacity during Q2, the report said (see table below). With the world's IC suppliers attempting to fight they way out of the worst industry recession ever, many device manufacturers and design houses are rushing to shift the technology mix to cutting-edge 0.18-micron and below processes. The result appears to be stampede and a rapid departure from what had been the industry's mainstream, workhorse technologies in the 1999-2000 boom--primarily quarter-micron CMOS processes. Capacity for wafer starts, measured in 8-inch equivalents, fell from 287,400 per week in the 0.3-to-0.2 micron category during Q1 to 242,600 in Q2, the new report said. While this segment was falling, installed capacity for leading-edge MOS technologies was surging. The report said installed wafer capacity for processes below 0.2 micron grew 32% in Q2 vs. Q1, and for the first time, leading-edge technologies had surpassed the previous generations with capacity installed for 295,200 eight-inch wafer starts per week in the second quarter. Even installed capacity for older MOS and bipolar processes grew in the second quarter. For example, capacity for IC made with 0.4-to-0.3 micron technologies was up 5.7% sequentially to 187,700 eight-inch wafer starts per week in Q2 compared to 177,000 in Q1, the SICAS report said. Bipolar IC capacity nudged up 2.4% to 306,200 five-inch wafer equivalents in Q2 from 298,900 in Q1, the report noted. Bipolar fab capacity utilization fell to 68.3% from 80.1% in Q1, the report said. MOS IC fab capacity scorecard Technologies Q1 2001* Q2 2001* % change Q1 utilization Q2 utilization Below 0.2 micron 223,500 wafers 295,200 wafers +32% 84.0% 80.4% 0.3-0.2 micron 287,400 wafers 242,600 wafers -15.6% 87.1% 69.7% 0.4-0.3 micron 177,000 wafers 187,700 wafers +6.0% 85.7% 65.8% 0.7-0.4 micron 205,200 wafers 214,200 wafers +4.4% 87.6% 67.4% Above 0.7 micron 265,700 wafers 262,300 wafers -1.3% 80.7% 74.1% *8-inch equivalent MOS wafer starts per week Source: SICAS report from SIA