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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: Pravin Kamdar who wrote (59066)10/18/2001 2:50:39 AM
From: David PletcherRead Replies (1) | Respond to of 275872
 
Regarding Intel's hypothetical plan to reduce AMD's effective fab capacity through cache size inflation:

There is a rapidly diminishing marginal performance gain for the average desktop user with increasing cache size. The marketplace is bi-modal, for the most part, consisting of ignorant customers and tech-savvy enthusiasts. The latter group isn't going to be fooled into believing that Intel's anemic P4 product line is good just because of a bump in cache size. The former group thinks cache is something you use to buy beer at the ball park. In the unlikely event that it became a marketing deficiency for AMD, they could bang the drum for next-generation chipsets to include tons of L3 cache at no added cost on the north bridge, as in the proposed Mamba chipset from Micron which was to feature 8 MB of L3 cache. If we can't get past the perception that MHz is the only measure that matters, I doubt that consumers will differentiate between L2 cache on-die and L3 cache in the north bridge. Moreover, I doubt that benchmarks would detect any meaningful difference in performance between 512K of added L2 cache or a few Mb of L3 cache. However L3 cache gets added -- embedded in the chipset or "son of COAST" -- SRAM is a low-margin commodity that needn't be produced in Dresden.



To: Pravin Kamdar who wrote (59066)10/18/2001 10:59:15 AM
From: dale_laroyRead Replies (1) | Respond to of 275872
 
>With the Athlon XP at 80 square mm in 0.13u, it seems that they are not following Northwood to a 512 KB L2 cache, but as you point out, they may be forced to follow suit.<

As I stated previously, AMD claimed 70mm2 for a 0.13-micron Palomino. Jerry's statement that they will have 315 die per wafer indicates that the die size of Barton, and possibly Thoroughbred, is closer to 80mm2. This extra 10mm2 is enough to accomodate an increase to 512KB L2 cache.

What is important however, is not the amount of L2 cache and die size of Thoroughbred/Barton, but the amount of L2 cache and die size of Clawhammer. We already know that Clawhammer will have 512KB L2 cache and a die size of 105mm2.