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To: jcholewa who wrote (60207)	10/25/2001 2:32:55 PM
From: Tenchusatsu	Read Replies (1) \| Respond to of 275872

JC, how about demos and "sampling" dates? We get a steady stream of those after a project reaches initial tapeout, don't we? Tenchusatsu

To: jcholewa who wrote (60207)	10/25/2001 3:15:02 PM
From: pgerassi	Read Replies (1) \| Respond to of 275872

Dear JC: I noticed that you were wondering why the Tyan Thunder board has a lower SPECint and SPECfp scores than the Epox board. It is simple. The Tyan requires the use of buffered DDR and the Epox can do with unbuffered DDR. The half cycle or so of increased latency is where most of the difference lies. This buffer increases Command, RAS and CAS cycle times from the best 1T-2-2 to 2T-2.5-2.5 adding perhaps as many as 2 whole cycles to a cache fill. In addition, ECC may be turned on and it adds some more latency (about 1/2 cycle) on top of that. Of course, given that DDR speeds are increasing, soon the penalty could be avoided by using faster underlying memory. Some PC2700 CAS2 memory could run at PC2100 CAS2 buffered. OTOH, max memory increases from 1.5GB (3x512MB DDR) to 4GB (4x1024MB ECC DDR) and that could make some applications run faster due to less disk I/O. Pete