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To: Dan3 who wrote (146521)	10/31/2001 5:04:59 PM
From: fingolfen	Read Replies (1) \| Respond to of 186894

I think about aggregate FAB costs per chip - your point about a steady, gradual, reduction in costs for a given process is well taken. But it still looks like AMD has projected a near 50% reduction in costs from the move to .13. They're begging for trouble then. They aren't going to get anywhere near 50% cost savings with SOI. Their cost per wafer will go up dramatically, and the only way they can get any cost savings is to sharply limit die size. That won't keep them in the performance hunt with Intel. That's based upon costs staying the same as last year, and the number of chips produced for that expenditure doubling. And most of that forecast reduction seems to be coming from the move to .13. It may be that it's misleading, because many of the costs of moving to .13 are being incurred now - while .18 parts are being shipped. If that's how they're justifying it, it's dishonest accounting. Any credible cost per wafer will include material, consumable, and tool depreciation cost per wafer start. I honestly don't think AMD would do that internally or externally. I haven't seen AMD claim a 50% cost reduction for 0.13 micron. I honestly think their cost per wafer will be much higher with SOI. If they try to go with 193 as well, the price continues to rise. If they have the expected yield fallout from SOI, then their cost per die picture is not pretty.