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To: maui_dude who wrote (146639)11/1/2001 8:37:49 PM
From: Elmer  Read Replies (2) | Respond to of 186894
 
Does anyone know if all these jackson technology layout is placed in one area to simply remove it and creating a new P4 stepping without major rework ? BTW, what percentage of the area is used up to enable HT in P4 ?

Ten said 5% was a likely number. In addition, P4 may have some DTF structures added that affect die size by 10-15%.

EP



To: maui_dude who wrote (146639)11/1/2001 9:33:22 PM
From: Saturn V  Read Replies (1) | Respond to of 186894
 
Ref < Does anyone know if all these jackson technology layout is placed in one area to simply remove it and creating a new P4 stepping without major rework ? BTW, what percentage of the area is used up to enable HT in P4 ? >

Based upon what Ten said, (and was confirmed at the IDF ),Jackson technology added 5-10% in transistor count. These transistors are scattered all over the chip, and it does not back sense to have different designs.

I believe that Hyperthreading can be enabled /disabled either via the BIOS, or by blowing a fuse( or equivalent) at final test. Hyperthreading is an easy way to improve performance. Intel will slowly enable it, first in the server versions, and in the desktop version. This is the segmentation philosophy to maximize the profit.