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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: wanna_bmw who wrote (62282)	11/5/2001 7:30:31 PM
From: Petz	Read Replies (2) \| Respond to of 275872

The fact is, with a half-speed decoder (slower yet???), situations will still occur when the code stream totally leaves the trace cache on the P4. Instruction after instruction will then have to run at half speed. 85% "hit rate" at full speed + 15% "miss rate" at half speed is still a heck of a lot slower than 100% at full speed. It is one reason that the P4 has lower IPC than the Athlon XP. CORRECTION: With half speed decoder, the P4 can execute not more than 0.5 instructions per clock on a trace cache miss. Since the nominal IPC is greater than 1, replace the paragraph above with: 85% "hit rate" at full speed + 15% "miss rate" at 1/3 speed is still a heck of a lot slower than 100% at full speed. In fact 0.85 +3*0.15, or 30% slower. Petz