SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: Joe NYC who wrote (62777)11/8/2001 12:30:21 AM
From: wanna_bmwRead Replies (1) | Respond to of 275872
 
Joe, Re: "Wait, but wouldn't each one of those Itanium get the bandwidth of slightly higher than Celeron? Hmmm... 4 processors at $6,000 each, and each processor get only a Celeron class bandwidth? It doesn't seem very balanced."

You are making an incorrect assumption. You think that just because there are four processors on a shared bus, that each processor will only receive data at one fourth the bandwidth. The reason this is incorrect is because today's chipsets are sophisticated enough to store requests in buffers, pipeline transactions, and even process those transactions out of order. That's why four Pentium III Xeon processors can all reside on a bus that only offers 800MB/s of bandwidth, and still offer better performance in memory intensive transactional processing than an Alpha 21264. Moreover, the Itanium front side bus is almost 3x the bandwidth of the Pentium III Xeon, and is even more sophisticated. The size of the upper level cache plays a large part, too, since more data is local to the processor.

wanna_bmw