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To: hmaly who wrote (63105)11/8/2001 6:46:02 PM
From: wanna_bmwRead Replies (1) | Respond to of 275872
 
hmaly, Re: "The PCI standard was used to connect hard disks, graphics cards etc. to the bus, which connected to the chipset. AFAIK HT will be used for far more than that; as in chip to chip. chipset to chip, and bus to chipset."

If you look at AMD's early presentations for Hypertransport, you will see that they intended it to be a general purpose interconnect, as you say. However, the group that generally decides what will become the next peripheral bus standard is PCISIG, and they chose 3GIO (AMD is part of PCISIG). That pretty much puts Hypertransport into more of a local interconnect (chip<->chip) market, rather than a general interconnect.

Re: "The HT AFAIK could eventually replace EV6"

That's a superset of Hypertransport that includes cache coherent transactions, and AMD has made this unlicensable.

Re: "or if Intel desired, the GTI (I believe) of the P3."

You mean GTL+ (Gunning Transceiver Logic, high voltage).

Re: "I don't even know what Intel calls their P4 bus."

GTL+ refers to the physical layer of the interface, not the protocol itself. Intel typically refers to the Pentium III bus protocol as the "P6" bus. The Pentium 4 bus might be referred to as the "Netburst" Bus, the "Willamette" Bus, or the "P7" Bus (I've heard all three). Tualatin (and later Northwood) use a lower voltage GTL bus (as opposed to GTL+). While Tualatin had incompatibility problems with older Pentium III motherboards, this won't be the case with Northwood, because Intel developed a way of creating what they call a "Universal Motherboard" design, which accepts both Willamette and Northwood processors.

Re: "It was the GTI that Intel licensed."

I believe Intel developed and owns the GTL+ bus.

Re: "Are you saying that either HT can't be used as a bus for chipset to chip, or that 3gio will be used in the future for Intels chipset to chip bus, and won't require licensing for say Via to make a chipset for the P4."

Once Intel turns control of 3GIO over to PCISIG (which happens after they finish the v1.0 SPEC), then VIA is free to build chipsets around 3GIO without getting a license from Intel. Instead, they pay a yearly (nominal) fee to PCISIG for ownership of the SPECs, and the fee is simply to allow PCISIG to keep the web page operational (it is a non-profit group).

wanna_bmw