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To: Petz who wrote (63152)	11/9/2001 3:31:21 AM
From: Tenchusatsu	Read Replies (1) \| Respond to of 275872

Petz, <Suppose two variables in memory are to be incremented by loading into the AX register, incrementing the register and then storing the result. I see no reason why the AX register coded by the programmer could not instead be the extra 32 bits of some other register on an x86-64 CPU. The second reference to the AX register can be "remapped" by the CPU to a register that the programmer knew nothing about.> That's already done by register renaming. When I talk about the "reorder buffer," I meant "register renaming." That's why your argument doesn't make any sense. The scenario you are talking about is known as "false dependency." Register renaming already takes care of that. Adding x86 registers won't help in this way. (They can help in another way, but that'll take some time to explain. Suffice to say that only recompiled programs can take advantage of the extra registers.) By the way, why did you bring up SMT in the first place? Hammer won't have it. Instead, it seems AMD might go with multi-core processors, much like POWER4. So it seems your argument would be moot to begin with. Tenchusatsu