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To: eCo who wrote (64222)	11/21/2001 3:50:45 PM
From: Ali Chen	Respond to of 275872

eco, Paul Demone is incorrect. I already gave a reference to Intel documentation in my post to TMay: Message 16682458 =========== If you still have doubts that "my method" of leakage current estimation is incorrect, read the paragraph 2.2.6, page 15: ftp://download.intel.com/design/PentiumIII/datashts/24965702.pdf It says: "Stopping of the BCLK input lowers the overall current consumption to leakage levels." ============== Also, in many earlier documents Intel explicitly describes the stop-clock Icc as "leakage current". Example, Table 9, page 27: "ICC,DSLP Processor Deep Sleep Leakage current at.." developer.intel.com - Ali