SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?


To: Robert Salasidis who wrote (149705)11/27/2001 12:31:00 AM
From: Paul Engel  Read Replies (1) | Respond to of 186894
 
Robert - Re: "on chip microstrip lines will likely be needed for any interconnects longer than about 25-50um (assuming trace lengths risetime/propagation delay should be length/6)...Does anyone foresee any difficulties in terms of transistor density because of this? "

The first flag to be raised will be on the master clock itself.

This needs to be transmitted/distributed throughout the die - and that covers a lot of distance and area.

The 5 to 10 GHz frequency may be doable - as Intel has already demoed 3.5 GHz operation (7 GHz internal 2x ALU clock) on a 0.13 micron Pentium 4.

Paul