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To: Elmer who wrote (149949)11/27/2001 11:44:33 PM
From: Tony Viola  Read Replies (1) | Respond to of 186894
 
To my knowledge, from roadmaps from both sides of the Intel-OEM relationship, there were always two Foster types: DP with small cache and MP with large cache. That's like it was with PIII: PIII Xeon small cache and PIII Xeon large cache. The thing that is different is that, in this new chip, they're calling the large cache L3 instead of L2. What is it, trace cache is L1, Instruction cache L2 and the big cache is L3? I don't know.

Tony


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